From 1112af9f8c4bed24bd82da320418a46066ca8b74 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 31 May 2019 18:53:55 +0530 Subject: [PATCH] gpu: nvgpu: add flag for global fecs trace buffer index Add compile time flag check CONFIG_NVGPU_FECS_TRACE for NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER Also add the flag check for setting NVGPU_FECS_TRACE_* characteristics flag Jira NVGPU-3506 Change-Id: I57f1538c852834b9be075a7b56b79fd699c04024 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/2132259 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/global_ctx.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_tu104.c | 2 ++ drivers/gpu/nvgpu/include/nvgpu/gr/global_ctx.h | 2 ++ 6 files changed, 12 insertions(+) diff --git a/drivers/gpu/nvgpu/common/gr/global_ctx.c b/drivers/gpu/nvgpu/common/gr/global_ctx.c index bdd98f04e..8d9c8449f 100644 --- a/drivers/gpu/nvgpu/common/gr/global_ctx.c +++ b/drivers/gpu/nvgpu/common/gr/global_ctx.c @@ -170,6 +170,7 @@ int nvgpu_gr_global_ctx_buffer_alloc(struct gk20a *g, goto clean_up; } +#ifdef CONFIG_NVGPU_FECS_TRACE if (desc[NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER].size != 0U) { err = nvgpu_gr_global_ctx_buffer_alloc_sys(g, desc, NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER); @@ -177,6 +178,7 @@ int nvgpu_gr_global_ctx_buffer_alloc(struct gk20a *g, goto clean_up; } } +#endif if (desc[NVGPU_GR_GLOBAL_CTX_RTV_CIRCULAR_BUFFER].size != 0U) { err = nvgpu_gr_global_ctx_buffer_alloc_sys(g, desc, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 2b067813d..f03a1ec71 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -1093,8 +1093,10 @@ int gm20b_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); +#ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); +#endif /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ if (gops->fuse.check_priv_security(g) != 0) { diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index d125cba20..191333dc5 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -1173,8 +1173,10 @@ int gp10b_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); +#ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, false); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); +#endif nvgpu_pramin_ops_init(g); diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 7d1beb4cf..d21aae5aa 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -1362,8 +1362,10 @@ int gv11b_init_hal(struct gk20a *g) } nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); +#ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, true); +#endif nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true); diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index f94e9040f..1ed1bc66c 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -1496,8 +1496,10 @@ int tu104_init_hal(struct gk20a *g) nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, true); nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, true); +#ifdef CONFIG_NVGPU_FECS_TRACE nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, true); +#endif nvgpu_set_enabled(g, NVGPU_SUPPORT_SEC2_RTOS, true); nvgpu_set_enabled(g, NVGPU_SUPPORT_PMU_RTOS_FBQ, true); nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true); diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/global_ctx.h b/drivers/gpu/nvgpu/include/nvgpu/gr/global_ctx.h index d8bbcf165..d333edaa7 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gr/global_ctx.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gr/global_ctx.h @@ -47,7 +47,9 @@ typedef void (*global_ctx_mem_destroy_fn)(struct gk20a *g, #define NVGPU_GR_GLOBAL_CTX_PRIV_ACCESS_MAP 6U #define NVGPU_GR_GLOBAL_CTX_RTV_CIRCULAR_BUFFER 7U +#ifdef CONFIG_NVGPU_FECS_TRACE #define NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER 8U +#endif #define NVGPU_GR_GLOBAL_CTX_COUNT 9U struct nvgpu_gr_global_ctx_buffer_desc *nvgpu_gr_global_ctx_desc_alloc(