diff --git a/userspace/required_tests.ini b/userspace/required_tests.ini
index fa94df4fb..c16172a4c 100644
--- a/userspace/required_tests.ini
+++ b/userspace/required_tests.ini
@@ -140,7 +140,7 @@ test_nvgpu_enabled_bvec.bvec_enabled=0
 
 [falcon]
 free_falcon_test_env.falcon_free_test_env=0
-test_falcon_bootstrap.falcon_bootstrap=0
+test_falcon_bootstrap.falcon_bootstrap=2
 test_falcon_get_id.falcon_get_id=0
 test_falcon_halt.falcon_halt=0
 test_falcon_idle.falcon_idle=0
@@ -153,7 +153,7 @@ test_falcon_mem_rw_inval_port.falcon_mem_rw_inval_port=0
 test_falcon_mem_rw_range.falcon_mem_rw_range=0
 test_falcon_mem_rw_unaligned_cpu_buffer.falcon_mem_rw_unaligned_cpu_buffer=0
 test_falcon_mem_rw_zero.falcon_mem_rw_zero=0
-test_falcon_mem_scrub.falcon_mem_scrub=0
+test_falcon_mem_scrub.falcon_mem_scrub=2
 test_falcon_reset.falcon_reset=0
 test_falcon_sw_init_free.falcon_sw_init_free=0
 
@@ -233,14 +233,14 @@ test_fuse_device_common_cleanup.fuse_gm20b_cleanup=0
 test_fuse_device_common_cleanup.fuse_gp10b_cleanup=0
 test_fuse_device_common_init.fuse_gm20b_init=0
 test_fuse_device_common_init.fuse_gp10b_init=0
-test_fuse_gm20b_basic_fuses.fuse_gm20b_basic_fuses=0
+test_fuse_gm20b_basic_fuses.fuse_gm20b_basic_fuses=2
 test_fuse_gp10b_check_gcplex_fail.fuse_gp10b_check_gcplex_fail=0
 test_fuse_gp10b_check_non_sec.fuse_gp10b_check_non_sec=0
-test_fuse_gp10b_check_sec.fuse_gp10b_check_sec=0
-test_fuse_gp10b_check_sec_invalid_gcplex.fuse_gp10b_check_sec_invalid_gcplex=0
-test_fuse_gp10b_ecc.fuse_gp10b_ecc=0
+test_fuse_gp10b_check_sec.fuse_gp10b_check_sec=2
+test_fuse_gp10b_check_sec_invalid_gcplex.fuse_gp10b_check_sec_invalid_gcplex=2
+test_fuse_gp10b_ecc.fuse_gp10b_ecc=2
 test_fuse_gp10b_feature_override_disable.fuse_gp10b_feature_override_disable=0
-test_fuse_gm20b_basic_fuses_bvec.test_fuse_gm20b_basic_fuses_bvec=0
+test_fuse_gm20b_basic_fuses_bvec.test_fuse_gm20b_basic_fuses_bvec=2
 
 [gmmu_gk20a_fusa]
 test_gk20a_get_pde_pgsz.pde_pgsz=0
@@ -420,23 +420,23 @@ test_handle_nonreplay_replay_fault.handle_nonreplay_s3=0
 
 [nvgpu-acr]
 free_falcon_test_env.acr_free_falcon_test_env=0
-test_acr_bootstrap_hs_acr.acr_bootstrap_hs_acr=0
-test_acr_construct_execute.acr_construct_execute=0
+test_acr_bootstrap_hs_acr.acr_bootstrap_hs_acr=2
+test_acr_construct_execute.acr_construct_execute=2
 test_acr_init.acr_init=0
 test_acr_is_lsf_lazy_bootstrap.acr_is_lsf_lazy_bootstrap=0
-test_acr_prepare_ucode_blob.acr_prepare_ucode_blob=0
+test_acr_prepare_ucode_blob.acr_prepare_ucode_blob=2
 
 [nvgpu-ltc]
 test_determine_L2_size_bytes.ltc_determine_L2_size=0
 test_flush_ltc.ltc_flush=0
 test_ltc_ecc_init_free.ltc_ecc_init_free=0
-test_ltc_functionality_tests.ltc_functionality_tests=0
+test_ltc_functionality_tests.ltc_functionality_tests=2
 test_ltc_init_support.ltc_init_support=0
 test_ltc_intr.ltc_intr=0
-test_ltc_intr_configure.ltc_intr_configure=0
+test_ltc_intr_configure.ltc_intr_configure=2
 test_ltc_negative_tests.ltc_negative_tests=0
 test_ltc_remove_support.ltc_remove_support=0
-test_ltc_intr_bvec.ltc_intr_bvec=0
+test_ltc_intr_bvec.ltc_intr_bvec=2
 
 [nvgpu-netlist]
 test_netlist_init_support.netlist_init_support=0
@@ -448,9 +448,9 @@ test_netlist_remove_support.netlist_remove_support=0
 free_falcon_test_env.falcon_free_test_env=0
 test_is_pmu_supported.pmu_supported=0
 test_pmu_early_init.pmu_early_init=0
-test_pmu_isr.pmu_isr=0
+test_pmu_isr.pmu_isr=2
 test_pmu_remove_support.pmu_remove_support=0
-test_pmu_reset.pmu_reset=0
+test_pmu_reset.pmu_reset=2
 
 [nvgpu-rc]
 test_rc_ctxsw_timeout.rc_ctxsw_timeout=0
@@ -625,7 +625,7 @@ test_gr_falcon_query_test.gr_falcon_query_test=0
 [nvgpu_gr_fs_state]
 test_gr_fs_state_error_injection.gr_fs_state_error_injection=2
 test_gr_init_setup_cleanup.gr_fs_state_cleanup=0
-test_gr_init_setup_ready.gr_fs_state_setup=0
+test_gr_init_setup_ready.gr_fs_state_setup=2
 
 [nvgpu_gr_global_ctx]
 test_gr_global_ctx_alloc_error_injection.gr_global_ctx_alloc_errors=0
@@ -652,16 +652,16 @@ test_gr_suspend.gr_suspend=0
 
 [nvgpu_gr_intr]
 test_gr_init_setup_cleanup.gr_intr_cleanup=0
-test_gr_init_setup_ready.gr_intr_setup=0
-test_gr_intr_fecs_exceptions.gr_intr_fecs_exceptions=0
-test_gr_intr_gpc_exceptions.gr_intr_gpc_exceptions=0
-test_gr_intr_setup_channel.gr_intr_with_channel=0
-test_gr_intr_sw_exceptions.gr_intr_sw_method=0
-test_gr_intr_without_channel.gr_intr_channel_free=0
+test_gr_init_setup_ready.gr_intr_setup=2
+test_gr_intr_fecs_exceptions.gr_intr_fecs_exceptions=2
+test_gr_intr_gpc_exceptions.gr_intr_gpc_exceptions=2
+test_gr_intr_setup_channel.gr_intr_with_channel=2
+test_gr_intr_sw_exceptions.gr_intr_sw_method=2
+test_gr_intr_without_channel.gr_intr_channel_free=2
 
 [nvgpu_gr_obj_ctx]
 test_gr_init_setup_cleanup.gr_obj_ctx_cleanup=0
-test_gr_init_setup_ready.gr_obj_ctx_setup=0
+test_gr_init_setup_ready.gr_obj_ctx_setup=2
 test_gr_obj_ctx_error_injection.gr_obj_ctx_alloc_errors=2
 
 [nvgpu_gr_setup]
@@ -1044,7 +1044,7 @@ therm_test_free_env.therm_free_env=0
 therm_test_setup_env.therm_setup_env=0
 test_therm_init_support.therm_init_support=0
 test_therm_init_elcg_mode.gv11b_therm_init_elcg_mode=0
-test_elcg_init_idle_filters.gv11b_elcg_init_idle_filters=0
+test_elcg_init_idle_filters.gv11b_elcg_init_idle_filters=2
 
 [top]
 test_device_info_parse_data.top_device_info_parse_data=0
@@ -1060,7 +1060,7 @@ test_top_setup.top_setup=0
 
 [vm]
 test_batch.batch=0
-test_init_error_paths.init_error_paths=0
+test_init_error_paths.init_error_paths=2
 test_map_buf.map_buf=0
 test_map_buf_gpu_va.map_buf_gpu_va=0
 test_map_buffer_error_cases.map_buffer_error_cases=0
diff --git a/userspace/units/acr/nvgpu-acr.c b/userspace/units/acr/nvgpu-acr.c
index 80a35d8bf..d32d74547 100644
--- a/userspace/units/acr/nvgpu-acr.c
+++ b/userspace/units/acr/nvgpu-acr.c
@@ -1050,14 +1050,14 @@ static int free_falcon_test_env(struct unit_module *m, struct gk20a *g,
 struct unit_module_test nvgpu_acr_tests[] = {
 	UNIT_TEST(acr_init, test_acr_init, NULL, 0),
 #if defined(__QNX__)
-	UNIT_TEST(acr_prepare_ucode_blob, test_acr_prepare_ucode_blob, NULL, 0),
+	UNIT_TEST(acr_prepare_ucode_blob, test_acr_prepare_ucode_blob, NULL, 2),
 	UNIT_TEST(acr_is_lsf_lazy_bootstrap,
 				test_acr_is_lsf_lazy_bootstrap, NULL, 0),
 	UNIT_TEST(acr_construct_execute, test_acr_construct_execute,
-			NULL, 0),
+			NULL, 2),
 
 	UNIT_TEST(acr_bootstrap_hs_acr, test_acr_bootstrap_hs_acr,
-			NULL, 0),
+			NULL, 2),
 #endif
 	UNIT_TEST(acr_free_falcon_test_env, free_falcon_test_env, NULL, 0),
 
diff --git a/userspace/units/falcon/falcon_tests/falcon.c b/userspace/units/falcon/falcon_tests/falcon.c
index bdb75fba7..31fa08f92 100644
--- a/userspace/units/falcon/falcon_tests/falcon.c
+++ b/userspace/units/falcon/falcon_tests/falcon.c
@@ -1357,7 +1357,7 @@ struct unit_module_test falcon_tests[] = {
 	UNIT_TEST(falcon_sw_init_free, test_falcon_sw_init_free, NULL, 0),
 	UNIT_TEST(falcon_get_id, test_falcon_get_id, NULL, 0),
 	UNIT_TEST(falcon_reset, test_falcon_reset, NULL, 0),
-	UNIT_TEST(falcon_mem_scrub, test_falcon_mem_scrub, NULL, 0),
+	UNIT_TEST(falcon_mem_scrub, test_falcon_mem_scrub, NULL, 2),
 	UNIT_TEST(falcon_idle, test_falcon_idle, NULL, 0),
 	UNIT_TEST(falcon_halt, test_falcon_halt, NULL, 0),
 	UNIT_TEST(falcon_mem_rw_init, test_falcon_mem_rw_init, NULL, 0),
@@ -1370,7 +1370,7 @@ struct unit_module_test falcon_tests[] = {
 	UNIT_TEST(falcon_mem_rw_aligned, test_falcon_mem_rw_aligned, NULL, 0),
 	UNIT_TEST(falcon_mem_rw_zero, test_falcon_mem_rw_zero, NULL, 0),
 	UNIT_TEST(falcon_mailbox, test_falcon_mailbox, NULL, 0),
-	UNIT_TEST(falcon_bootstrap, test_falcon_bootstrap, NULL, 0),
+	UNIT_TEST(falcon_bootstrap, test_falcon_bootstrap, NULL, 2),
 	UNIT_TEST(falcon_irq, test_falcon_irq, NULL, 0),
 
 	/* Cleanup */
diff --git a/userspace/units/fuse/nvgpu-fuse.c b/userspace/units/fuse/nvgpu-fuse.c
index 946a0ecb1..cb5949158 100644
--- a/userspace/units/fuse/nvgpu-fuse.c
+++ b/userspace/units/fuse/nvgpu-fuse.c
@@ -160,7 +160,7 @@ int test_fuse_device_common_cleanup(struct unit_module *m,
 struct unit_module_test fuse_tests[] = {
 	UNIT_TEST(fuse_gp10b_init, test_fuse_device_common_init,
 		  &gp10b_init_args, 0),
-	UNIT_TEST(fuse_gp10b_check_sec, test_fuse_gp10b_check_sec, NULL, 0),
+	UNIT_TEST(fuse_gp10b_check_sec, test_fuse_gp10b_check_sec, NULL, 2),
 	UNIT_TEST(fuse_gp10b_check_gcplex_fail,
 		  test_fuse_gp10b_check_gcplex_fail,
 		  NULL,
@@ -168,12 +168,12 @@ struct unit_module_test fuse_tests[] = {
 	UNIT_TEST(fuse_gp10b_check_sec_invalid_gcplex,
 		  test_fuse_gp10b_check_sec_invalid_gcplex,
 		  NULL,
-		  0),
+		  2),
 	UNIT_TEST(fuse_gp10b_check_non_sec,
 		  test_fuse_gp10b_check_non_sec,
 		  NULL,
 		  0),
-	UNIT_TEST(fuse_gp10b_ecc, test_fuse_gp10b_ecc, NULL, 0),
+	UNIT_TEST(fuse_gp10b_ecc, test_fuse_gp10b_ecc, NULL, 2),
 	UNIT_TEST(fuse_gp10b_feature_override_disable,
 		  test_fuse_gp10b_feature_override_disable, NULL, 0),
 #ifdef CONFIG_NVGPU_SIM
@@ -199,8 +199,8 @@ struct unit_module_test fuse_tests[] = {
 		  NULL,
 		  0),
 #endif
-	UNIT_TEST(fuse_gm20b_basic_fuses, test_fuse_gm20b_basic_fuses, NULL, 0),
-	UNIT_TEST(test_fuse_gm20b_basic_fuses_bvec, test_fuse_gm20b_basic_fuses_bvec, NULL, 0),
+	UNIT_TEST(fuse_gm20b_basic_fuses, test_fuse_gm20b_basic_fuses, NULL, 2),
+	UNIT_TEST(test_fuse_gm20b_basic_fuses_bvec, test_fuse_gm20b_basic_fuses_bvec, NULL, 2),
 #ifdef CONFIG_NVGPU_SIM
 	UNIT_TEST(fuse_gm20b_check_fmodel, test_fuse_gm20b_check_fmodel, NULL, 0),
 #endif
diff --git a/userspace/units/gr/fs_state/nvgpu-gr-fs-state.c b/userspace/units/gr/fs_state/nvgpu-gr-fs-state.c
index 78a23a738..3e105ddc5 100644
--- a/userspace/units/gr/fs_state/nvgpu-gr-fs-state.c
+++ b/userspace/units/gr/fs_state/nvgpu-gr-fs-state.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -89,7 +89,7 @@ int test_gr_fs_state_error_injection(struct unit_module *m,
 }
 
 struct unit_module_test nvgpu_gr_fs_state_tests[] = {
-	UNIT_TEST(gr_fs_state_setup, test_gr_init_setup_ready, NULL, 0),
+	UNIT_TEST(gr_fs_state_setup, test_gr_init_setup_ready, NULL, 2),
 	UNIT_TEST(gr_fs_state_error_injection, test_gr_fs_state_error_injection, NULL, 2),
 	UNIT_TEST(gr_fs_state_cleanup, test_gr_init_setup_cleanup, NULL, 0),
 };
diff --git a/userspace/units/gr/intr/nvgpu-gr-intr.c b/userspace/units/gr/intr/nvgpu-gr-intr.c
index 4a96c2a93..2cc6ffe85 100644
--- a/userspace/units/gr/intr/nvgpu-gr-intr.c
+++ b/userspace/units/gr/intr/nvgpu-gr-intr.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -1266,12 +1266,12 @@ int test_gr_intr_fecs_exceptions(struct unit_module *m,
 }
 
 struct unit_module_test nvgpu_gr_intr_tests[] = {
-	UNIT_TEST(gr_intr_setup, test_gr_init_setup_ready, NULL, 0),
-	UNIT_TEST(gr_intr_channel_free, test_gr_intr_without_channel, NULL, 0),
-	UNIT_TEST(gr_intr_sw_method, test_gr_intr_sw_exceptions, NULL, 0),
-	UNIT_TEST(gr_intr_fecs_exceptions, test_gr_intr_fecs_exceptions, NULL, 0),
-	UNIT_TEST(gr_intr_gpc_exceptions, test_gr_intr_gpc_exceptions, NULL, 0),
-	UNIT_TEST(gr_intr_with_channel, test_gr_intr_setup_channel, NULL, 0),
+	UNIT_TEST(gr_intr_setup, test_gr_init_setup_ready, NULL, 2),
+	UNIT_TEST(gr_intr_channel_free, test_gr_intr_without_channel, NULL, 2),
+	UNIT_TEST(gr_intr_sw_method, test_gr_intr_sw_exceptions, NULL, 2),
+	UNIT_TEST(gr_intr_fecs_exceptions, test_gr_intr_fecs_exceptions, NULL, 2),
+	UNIT_TEST(gr_intr_gpc_exceptions, test_gr_intr_gpc_exceptions, NULL, 2),
+	UNIT_TEST(gr_intr_with_channel, test_gr_intr_setup_channel, NULL, 2),
 	UNIT_TEST(gr_intr_cleanup, test_gr_init_setup_cleanup, NULL, 0),
 };
 
diff --git a/userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.c b/userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.c
index 893ac9e28..1036e3e51 100644
--- a/userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.c
+++ b/userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.c
@@ -426,7 +426,7 @@ int test_gr_obj_ctx_error_injection(struct unit_module *m,
 }
 
 struct unit_module_test nvgpu_gr_obj_ctx_tests[] = {
-	UNIT_TEST(gr_obj_ctx_setup, test_gr_init_setup_ready, NULL, 0),
+	UNIT_TEST(gr_obj_ctx_setup, test_gr_init_setup_ready, NULL, 2),
 	UNIT_TEST(gr_obj_ctx_alloc_errors, test_gr_obj_ctx_error_injection, NULL, 2),
 	UNIT_TEST(gr_obj_ctx_cleanup, test_gr_init_setup_cleanup, NULL, 0),
 };
diff --git a/userspace/units/ltc/nvgpu-ltc.c b/userspace/units/ltc/nvgpu-ltc.c
index 4ecb4d4f2..40575d9f5 100644
--- a/userspace/units/ltc/nvgpu-ltc.c
+++ b/userspace/units/ltc/nvgpu-ltc.c
@@ -847,10 +847,10 @@ struct unit_module_test nvgpu_ltc_tests[] = {
 	UNIT_TEST(ltc_init_support, test_ltc_init_support, NULL, 0),
 	UNIT_TEST(ltc_ecc_init_free, test_ltc_ecc_init_free, NULL, 0),
 	UNIT_TEST(ltc_functionality_tests, test_ltc_functionality_tests,
-								NULL, 0),
+								NULL, 2),
 	UNIT_TEST(ltc_intr, test_ltc_intr, NULL, 0),
-	UNIT_TEST(ltc_intr_bvec, test_ltc_intr_bvec, NULL, 0),
-	UNIT_TEST(ltc_intr_configure, test_ltc_intr_configure, NULL, 0),
+	UNIT_TEST(ltc_intr_bvec, test_ltc_intr_bvec, NULL, 2),
+	UNIT_TEST(ltc_intr_configure, test_ltc_intr_configure, NULL, 2),
 	UNIT_TEST(ltc_determine_L2_size, test_determine_L2_size_bytes, NULL, 0),
 #ifdef CONFIG_NVGPU_NON_FUSA
 	UNIT_TEST(ltc_intr_en_illegal_compstat,
diff --git a/userspace/units/mm/vm/vm.c b/userspace/units/mm/vm/vm.c
index d0ddbe873..ee27a3be2 100644
--- a/userspace/units/mm/vm/vm.c
+++ b/userspace/units/mm/vm/vm.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -2407,7 +2407,7 @@ struct unit_module_test vm_tests[] = {
 		      test_map_buf,
 		      NULL,
 		      0),
-	UNIT_TEST(init_error_paths, test_init_error_paths, NULL, 0),
+	UNIT_TEST(init_error_paths, test_init_error_paths, NULL, 2),
 	UNIT_TEST(map_buffer_error_cases, test_map_buffer_error_cases, NULL, 0),
 	UNIT_TEST(map_buffer_security, test_map_buffer_security, NULL, 0),
 	UNIT_TEST(map_buffer_security_error_cases, test_map_buffer_security_error_cases, NULL, 0),
diff --git a/userspace/units/pmu/nvgpu-pmu.c b/userspace/units/pmu/nvgpu-pmu.c
index 7f5c62208..9bfcba269 100644
--- a/userspace/units/pmu/nvgpu-pmu.c
+++ b/userspace/units/pmu/nvgpu-pmu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -744,8 +744,8 @@ struct unit_module_test nvgpu_pmu_tests[] = {
 	UNIT_TEST(pmu_early_init, test_pmu_early_init, NULL, 0),
 	UNIT_TEST(pmu_supported, test_is_pmu_supported, NULL, 0),
 	UNIT_TEST(pmu_remove_support, test_pmu_remove_support, NULL, 0),
-	UNIT_TEST(pmu_reset, test_pmu_reset, NULL, 0),
-	UNIT_TEST(pmu_isr, test_pmu_isr, NULL, 0),
+	UNIT_TEST(pmu_reset, test_pmu_reset, NULL, 2),
+	UNIT_TEST(pmu_isr, test_pmu_isr, NULL, 2),
 
 	UNIT_TEST(falcon_free_test_env, free_falcon_test_env, NULL, 0),
 };
diff --git a/userspace/units/therm/nvgpu-therm.c b/userspace/units/therm/nvgpu-therm.c
index bd2b072a9..3c4fc622a 100644
--- a/userspace/units/therm/nvgpu-therm.c
+++ b/userspace/units/therm/nvgpu-therm.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -135,7 +135,7 @@ struct unit_module_test therm_tests[] = {
 	UNIT_TEST(therm_setup_env,		therm_test_setup_env,			NULL, 0),
 	UNIT_TEST(therm_init_support,		test_therm_init_support,		NULL, 0),
 	UNIT_TEST(gv11b_therm_init_elcg_mode,	test_therm_init_elcg_mode,		NULL, 0),
-	UNIT_TEST(gv11b_elcg_init_idle_filters,	test_elcg_init_idle_filters,		NULL, 0),
+	UNIT_TEST(gv11b_elcg_init_idle_filters,	test_elcg_init_idle_filters,		NULL, 2),
 	UNIT_TEST(therm_free_env,		therm_test_free_env,			NULL, 0),
 };