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gpu: nvgpu: Rename struct nvgpu_runlist_info, fields in fifo

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Rename struct nvgpu_runlist_info to struct nvgpu_runlist; the
info is not necessary. struct nvgpu_runlist is soon to be a
first class object among the nvgpu object model.

Also rename the fields runlist_info and active_runlist_info to
simply runlists and active_runlists respectively. Again the info
text is just not necessary and somewhat misleading. These structs
_are_ the runlist representations in SW; they are not merely
informational.

Also add an rl_dbg() macro to print debug info specific to
runlist management and some debug prints specifying the runlist
topology for the running chip.

Change-Id: Id9fcbdd1a7227cb5f8c75cca4abbff94fe048e49
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2470303
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2020-12-31 19:40:00 -06:00
committed by mobile promotions
parent a4dc48061c
commit 11d3785faf
18 changed files with 137 additions and 127 deletions
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2
userspace/units/fifo/preempt/gv11b/nvgpu-preempt-gv11b.c
View File

@@ -369,7 +369,7 @@ int test_gv11b_fifo_is_preempt_pending(struct unit_module *m, struct gk20a *g,
u32 ctx_stat = 0U;
u32 id = 0U, next_id = 0U;
/* Assuming runlist_id is 0 */
u32 runlist_served_pbdmas = g->fifo.runlist_info[0U]->pbdma_bitmask;
u32 runlist_served_pbdmas = g->fifo.runlists[0U]->pbdma_bitmask;
timers_fi = nvgpu_timers_get_fault_injection();

6
userspace/units/fifo/preempt/nvgpu-preempt.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -223,12 +223,12 @@ int test_preempt_poll_tsg_on_pbdma(struct unit_module *m, struct gk20a *g,
if (branches & F_PREEMPT_POLL_PBDMA_BUSY) {
unit_assert(stub[0].pbdma_id !=
nvgpu_ffs(f->runlist_info[0]->pbdma_bitmask),
nvgpu_ffs(f->runlists[0]->pbdma_bitmask),
goto done);
} else if (!(branches & F_PREEMPT_POLL_PBDMA_NULL)) {
unit_assert(stub[0].tsgid == 0, goto done);
unit_assert(stub[0].pbdma_id ==
nvgpu_ffs(f->runlist_info[0]->pbdma_bitmask),
nvgpu_ffs(f->runlists[0]->pbdma_bitmask),
goto done);
}
}

20
userspace/units/fifo/runlist/nvgpu-runlist.c
View File

@@ -152,11 +152,11 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map,
unsigned long *ch_map, struct nvgpu_tsg *tsgs,
struct nvgpu_channel *chs, unsigned int num_tsgs,
unsigned int num_channels,
struct nvgpu_runlist_info **runlists, u32 *rl_data,
struct nvgpu_runlist **runlists, u32 *rl_data,
bool interleave)
{
struct nvgpu_fifo *f = &g->fifo;
struct nvgpu_runlist_info *runlist = runlists[0];
struct nvgpu_runlist *runlist = runlists[0];
/* we only use the runlist 0 here */
runlist->mem[0].aperture = APERTURE_SYSMEM;
@@ -178,7 +178,7 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map,
f->tsg = tsgs;
f->channel = chs;
f->num_channels = num_channels;
f->runlist_info = runlists;
f->runlists = runlists;
/*
* For testing the runlist entry order format, these simpler dual-u32
@@ -241,7 +241,7 @@ static int run_format_test(struct unit_module *m, struct nvgpu_fifo *f,
setup_tsg_multich(tsg, chs, 0, prio, 5, n_ch);
/* entry capacity: tsg header and some channels */
n = nvgpu_runlist_construct_locked(f, f->runlist_info[0], 0, 1 + n_ch);
n = nvgpu_runlist_construct_locked(f, f->runlists[0], 0, 1 + n_ch);
if (n != 1 + n_ch) {
return -1;
@@ -308,8 +308,8 @@ static const char *f_runlist_format[] = {
int test_tsg_format_gen(struct unit_module *m, struct gk20a *g, void *args)
{
struct nvgpu_fifo *f = &g->fifo;
struct nvgpu_runlist_info runlist;
struct nvgpu_runlist_info *runlists = &runlist;
struct nvgpu_runlist runlist;
struct nvgpu_runlist *runlists = &runlist;
unsigned long active_tsgs_map = 0;
unsigned long active_chs_map = 0;
struct nvgpu_tsg tsgs[1] = {{0}};
@@ -412,8 +412,8 @@ static int test_common_gen(struct unit_module *m, struct gk20a *g,
u32 *expected, u32 expect_count)
{
struct nvgpu_fifo *f = &g->fifo;
struct nvgpu_runlist_info runlist;
struct nvgpu_runlist_info *runlists = &runlist;
struct nvgpu_runlist runlist;
struct nvgpu_runlist *runlists = &runlist;
unsigned long active_tsgs_map = 0;
unsigned long active_chs_map = 0;
struct nvgpu_tsg tsgs[6] = {{0}};
@@ -978,8 +978,8 @@ done:
#define F_RUNLIST_SETUP_LAST BIT(6)
static const char *f_runlist_setup[] = {
"alloc_runlist_info_fail",
"alloc_active_runlist_info_fail",
"alloc_runlists_fail",
"alloc_active_runlists_fail",
"alloc_active_channels_fail",
"alloc_active_tsgs_fail",
"alloc_dma_flags_sys_fail",

4
userspace/units/fifo/tsg/nvgpu-tsg.c
View File

@@ -293,7 +293,7 @@ int test_tsg_bind_channel(struct unit_module *m,
struct nvgpu_channel *chA = NULL;
struct nvgpu_channel *chB = NULL;
struct nvgpu_channel *ch = NULL;
struct nvgpu_runlist_info *runlist = NULL;
struct nvgpu_runlist *runlist = NULL;
u32 branches = 0U;
int ret = UNIT_FAIL;
int err;
@@ -344,7 +344,7 @@ int test_tsg_bind_channel(struct unit_module *m,
ch->runlist_id + 1 : tsg_save.runlist_id;
/* ch already already active */
runlist = &f->active_runlist_info[tsg->runlist_id];
runlist = &f->active_runlists[tsg->runlist_id];
if (branches & F_TSG_BIND_CHANNEL_ACTIVE) {
nvgpu_set_bit(ch->chid, runlist->active_channels);
} else {