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gpu: nvgpu: modify wait_pending
The wait_pending HAL is now modified to simply check the pending status of a given runlist. The while loop is removed from this HAL. A new function nvgpu_runlist_wait_pending_legacy() is added that emulates the older wait_pending() HAL. nvgpu_runlist_tick() is modified to accept a 64 bit "preempt_grace_ns" value. These changes prepare for upcoming control-fifo parser changes. Jira NVGPU-8619 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Change-Id: If3f288eb6f2181743c53b657219b3b30d56d26bc Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2766100 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -744,7 +744,7 @@ test_fifo_init_support.init_support=0
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test_fifo_remove_support.remove_support=0
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test_gk20a_runlist_hw_submit.hw_submit=0
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test_gk20a_runlist_length_max.length_max=0
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test_gk20a_runlist_wait_pending.wait_pending=0
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test_gk20a_runlist_wait_pending.check_pending=0
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test_gk20a_runlist_write_state.write_state=0
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[nvgpu_runlist_gv11b]
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@@ -177,22 +177,22 @@ int test_gk20a_runlist_wait_pending(struct unit_module *m,
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/* no wait */
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ctx->count = 0;
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err = gk20a_runlist_wait_pending(g, runlist);
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err = nvgpu_runlist_wait_pending_legacy(g, runlist);
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unit_assert(err == 0, goto done);
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/* 1 loop */
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ctx->count = 1;
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err = gk20a_runlist_wait_pending(g, runlist);
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err = nvgpu_runlist_wait_pending_legacy(g, runlist);
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unit_assert(err == 0, goto done);
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/* 2 loops */
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ctx->count = 2;
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err = gk20a_runlist_wait_pending(g, runlist);
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err = nvgpu_runlist_wait_pending_legacy(g, runlist);
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unit_assert(err == 0, goto done);
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/* timeout */
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ctx->count = U32_MAX;
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err = gk20a_runlist_wait_pending(g, runlist);
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err = nvgpu_runlist_wait_pending_legacy(g, runlist);
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unit_assert(err == -ETIMEDOUT, goto done);
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ret = UNIT_SUCCESS;
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@@ -235,7 +235,7 @@ struct unit_module_test nvgpu_runlist_gk20a_tests[] = {
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UNIT_TEST(init_support, test_fifo_init_support, NULL, 0),
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UNIT_TEST(length_max, test_gk20a_runlist_length_max, NULL, 0),
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UNIT_TEST(hw_submit, test_gk20a_runlist_hw_submit, NULL, 0),
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UNIT_TEST(wait_pending, test_gk20a_runlist_wait_pending, NULL, 0),
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UNIT_TEST(check_pending, test_gk20a_runlist_wait_pending, NULL, 0),
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UNIT_TEST(write_state, test_gk20a_runlist_write_state, NULL, 0),
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UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0),
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};
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -76,28 +76,28 @@ int test_gk20a_runlist_hw_submit(struct unit_module *m,
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/**
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* Test specification for: test_gk20a_runlist_wait_pending
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*
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* Description: Branch coverage for gk20a_runlist_wait_pending
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* Description: Branch coverage for nvgpu_runlist_wait_pending_legacy
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*
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* Test Type: Feature
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*
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* Targets: gops_runlist.wait_pending, gk20a_runlist_wait_pending
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* Targets: gops_runlist.check_pending, nvgpu_runlist_wait_pending_legacy
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Check case where runlist is not pending (not wait).
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* - Set register to indicate that runlist is NOT pending.
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* - Call gk20a_runlist_wait_pending.
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* - Call nvgpu_runlist_wait_pending_legacy.
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* - Check case where some polling is needed until runlist is not pending:
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* - Install register IO callbacks in order to control
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* value read from fifo_eng_runlist_r register.
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* - Configure callback to clear pending bit after one nvgpu_readl.
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* - Call gk20a_runlist_wait_pending.
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* - Call nvgpu_runlist_wait_pending_legacy.
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* - Configure callback to clear pending bit after two nvgpu_readl.
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* - Call gk20a_runlist_wait_pending.
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* - Call nvgpu_runlist_wait_pending_legacy.
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* - Check case where polling times out:
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* - Set register to indicate that runlist is pending.
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* - Call gk20a_runlist_wait_pending.
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* - Call nvgpu_runlist_wait_pending_legacy.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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