From 14384edb687255f4d26024c3237fe365fc19a5ab Mon Sep 17 00:00:00 2001 From: sagar Date: Fri, 24 Jan 2020 11:38:25 +0530 Subject: [PATCH] nvgpu: force cilp in cta For integration testing in safety build, we need to test ctxsw firmware header interface. inorder to validate we populate header with unsupported data. Use CONFIG_NVGPU_CTXSW_FW_ERROR_HEADER_TESTING for testing CILP error. JIRA NVGPU-4471 Change-Id: Ibcd2f9cccc7a85403d2b006ad8164e37592ccaa1 Signed-off-by: sagar Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284602 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/Makefile.shared.configs | 3 +++ drivers/gpu/nvgpu/hal/gr/ctxsw_prog/ctxsw_prog_gp10b_fusa.c | 6 +++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nvgpu/Makefile.shared.configs b/drivers/gpu/nvgpu/Makefile.shared.configs index 2941a3c6d..c1eb4a540 100644 --- a/drivers/gpu/nvgpu/Makefile.shared.configs +++ b/drivers/gpu/nvgpu/Makefile.shared.configs @@ -78,6 +78,9 @@ NVGPU_COMMON_CFLAGS += \ # # NVGPU_COMMON_CFLAGS += \ # -DCONFIG_NVGPU_CTXSW_FW_ERROR_CODE_TESTING +# +# NVGPU_COMMON_CFLAGS += \ +# -DCONFIG_NVGPU_CTXSW_FW_ERROR_HEADER_TESTING endif diff --git a/drivers/gpu/nvgpu/hal/gr/ctxsw_prog/ctxsw_prog_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/gr/ctxsw_prog/ctxsw_prog_gp10b_fusa.c index 210ec0124..04c1ab390 100644 --- a/drivers/gpu/nvgpu/hal/gr/ctxsw_prog/ctxsw_prog_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/ctxsw_prog/ctxsw_prog_gp10b_fusa.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -34,7 +34,11 @@ void gp10b_ctxsw_prog_set_compute_preemption_mode_cta(struct gk20a *g, { nvgpu_mem_wr(g, ctx_mem, ctxsw_prog_main_image_compute_preemption_options_o(), +#if defined(CONFIG_NVGPU_CTXSW_FW_ERROR_HEADER_TESTING) + ctxsw_prog_main_image_compute_preemption_options_control_cilp_f()); +#else ctxsw_prog_main_image_compute_preemption_options_control_cta_f()); +#endif } void gp10b_ctxsw_prog_init_ctxsw_hdr_data(struct gk20a *g,