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gpu: nvgpu: Refactor Clk, Volt sub-unit

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As a part of refactoring, we need to move the volt unit from perf to pmu
as it belongs there and also move the arbitor specific functions under
CLK_ARB as they will be removed from safety build.
This patch does the following
*Move volt struct from perf to pmu
*Move volt setup from pmu_pstate to volt
*Move clk freq related functions into CLK_ARB

NVGPU-4491
NVGPU-4492

Change-Id: I7180cd12bbf91cc4d2e79b6e2d71c16e494c8ff0
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268215
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2019-12-27 18:43:26 +05:30
committed by Alex Waterman
parent 933b62a36e
commit 14b218c284
18 changed files with 176 additions and 105 deletions
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33
drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c
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@@ -44,7 +44,7 @@ static int volt_rail_state_init(struct gk20a *g,
for (i = 0; i < CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES; i++) {
pvolt_rail->volt_delta_uv[i] = (int)NV_PMU_VOLT_VALUE_0V_IN_UV;
g->perf_pmu->volt.volt_rail_metadata.ext_rel_delta_uv[i] =
g->pmu->volt->volt_rail_metadata.ext_rel_delta_uv[i] =
NV_PMU_VOLT_VALUE_0V_IN_UV;
}
@@ -100,7 +100,7 @@ static int volt_rail_init_pmudata_super(struct gk20a *g,
for (i = 0; i < CTRL_VOLT_RAIL_VOLT_DELTA_MAX_ENTRIES; i++) {
rail_pmu_data->volt_delta_uv[i] = prail->volt_delta_uv[i] +
(int)g->perf_pmu->volt.volt_rail_metadata.ext_rel_delta_uv[i];
(int)g->pmu->volt->volt_rail_metadata.ext_rel_delta_uv[i];
}
status = nvgpu_boardobjgrpmask_export(&prail->volt_dev_mask.super,
@@ -347,8 +347,8 @@ static int nvgpu_volt_rail_boardobj_grp_get_status(struct gk20a *g)
nvgpu_log_info(g, " ");
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrpmask = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.mask.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
pboardobjgrpmask = &g->pmu->volt->volt_rail_metadata.volt_rails.mask.super;
status = pboardobjgrp->pmugetstatus(g, pboardobjgrp, pboardobjgrpmask);
if (status != 0) {
nvgpu_err(g, "err getting boardobjs from pmu");
@@ -384,7 +384,7 @@ int nvgpu_volt_rail_sw_setup(struct gk20a *g)
nvgpu_log_info(g, " ");
status = nvgpu_boardobjgrp_construct_e32(g,
&g->perf_pmu->volt.volt_rail_metadata.volt_rails);
&g->pmu->volt->volt_rail_metadata.volt_rails);
if (status != 0) {
nvgpu_err(g,
"error creating boardobjgrp for volt rail, "
@@ -392,17 +392,16 @@ int nvgpu_volt_rail_sw_setup(struct gk20a *g)
goto done;
}
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
pboardobjgrp->pmudatainstget = _volt_rail_devgrp_pmudata_instget;
pboardobjgrp->pmustatusinstget = _volt_rail_devgrp_pmustatus_instget;
g->perf_pmu->volt.volt_rail_metadata.pct_delta =
g->pmu->volt->volt_rail_metadata.pct_delta =
NV_PMU_VOLT_VALUE_0V_IN_UV;
/* Obtain Voltage Rail Table from VBIOS */
status = volt_get_volt_rail_table(g, &g->perf_pmu->volt.
volt_rail_metadata);
status = volt_get_volt_rail_table(g, &g->pmu->volt->volt_rail_metadata);
if (status != 0) {
goto done;
}
@@ -420,7 +419,7 @@ int nvgpu_volt_rail_sw_setup(struct gk20a *g)
}
status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
&g->perf_pmu->volt.volt_rail_metadata.volt_rails.super,
&g->pmu->volt->volt_rail_metadata.volt_rails.super,
volt, VOLT, volt_rail, VOLT_RAIL);
if (status != 0) {
nvgpu_err(g,
@@ -430,7 +429,7 @@ int nvgpu_volt_rail_sw_setup(struct gk20a *g)
}
/* update calibration to fuse */
BOARDOBJGRP_FOR_EACH(&(g->perf_pmu->volt.volt_rail_metadata.
BOARDOBJGRP_FOR_EACH(&(g->pmu->volt->volt_rail_metadata.
volt_rails.super),
struct voltage_rail *, pvolt_rail, i) {
status = volt_rail_state_init(g, pvolt_rail);
@@ -454,7 +453,7 @@ int nvgpu_volt_rail_pmu_setup(struct gk20a *g)
nvgpu_log_info(g, " ");
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
if (!pboardobjgrp->bconstructed) {
return -EINVAL;
@@ -469,7 +468,7 @@ int nvgpu_volt_rail_pmu_setup(struct gk20a *g)
u8 nvgpu_volt_rail_vbios_volt_domain_convert_to_internal(struct gk20a *g,
u8 vbios_volt_domain)
{
if (g->perf_pmu->volt.volt_rail_metadata.volt_domain_hal ==
if (g->pmu->volt->volt_rail_metadata.volt_domain_hal ==
CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL) {
return CTRL_VOLT_DOMAIN_LOGIC;
} else {
@@ -480,7 +479,7 @@ u8 nvgpu_volt_rail_vbios_volt_domain_convert_to_internal(struct gk20a *g,
u8 nvgpu_volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain)
{
if (g->perf_pmu->volt.volt_rail_metadata.volt_domain_hal ==
if (g->pmu->volt->volt_rail_metadata.volt_domain_hal ==
CTRL_VOLT_DOMAIN_HAL_GP10X_SINGLE_RAIL) {
return 0U;
} else {
@@ -547,7 +546,7 @@ int nvgpu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_uv)
return status;
}
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;
@@ -576,7 +575,7 @@ int nvgpu_volt_get_curr_volt_ps35(struct gk20a *g, u32 *vcurr_uv)
return status;
}
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;
@@ -595,7 +594,7 @@ u8 nvgpu_volt_get_vmargin_ps35(struct gk20a *g)
struct voltage_rail *volt_rail = NULL;
u8 index, vmargin_uv;
pboardobjgrp = &g->perf_pmu->volt.volt_rail_metadata.volt_rails.super;
pboardobjgrp = &g->pmu->volt->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj *, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;