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gpu: nvgpu: Refactor Clk, Volt sub-unit
As a part of refactoring, we need to move the volt unit from perf to pmu as it belongs there and also move the arbitor specific functions under CLK_ARB as they will be removed from safety build. This patch does the following *Move volt struct from perf to pmu *Move volt setup from pmu_pstate to volt *Move clk freq related functions into CLK_ARB NVGPU-4491 NVGPU-4492 Change-Id: I7180cd12bbf91cc4d2e79b6e2d71c16e494c8ff0 Signed-off-by: Abdul Salam <absalam@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2268215 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
933b62a36e
commit
14b218c284
@@ -302,6 +302,7 @@ struct nvgpu_pmu {
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struct nvgpu_pmu_perfmon *pmu_perfmon;
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struct nvgpu_clk_pmupstate *clk_pmu;
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struct therm_pmupstate *therm_pmu;
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struct nvgpu_pmu_volt *volt;
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void (*remove_support)(struct nvgpu_pmu *pmu);
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void (*volt_rpc_handler)(struct gk20a *g,
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@@ -26,7 +26,6 @@
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#include <nvgpu/cond.h>
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#include <nvgpu/thread.h>
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#include <nvgpu/pmu/perf_pstate.h>
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#include <nvgpu/pmu/volt.h>
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#include <nvgpu/pmu/lpwr.h>
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#include <nvgpu/boardobjgrp_e32.h>
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#include <nvgpu/boardobjgrp_e255.h>
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@@ -87,7 +86,6 @@ struct perf_pmupstate {
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struct vfe_vars vfe_varobjs;
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struct vfe_equs vfe_equobjs;
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struct pstates pstatesobjs;
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struct obj_volt volt;
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struct obj_lwpr lpwr;
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struct nvgpu_vfe_invalidate vfe_init;
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struct change_seq_pmu changeseq_pmu;
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@@ -61,7 +61,7 @@ struct voltage_policy_metadata {
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struct boardobjgrp_e32 volt_policies;
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};
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struct obj_volt {
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struct nvgpu_pmu_volt {
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struct voltage_rail_metadata volt_rail_metadata;
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struct voltage_device_metadata volt_dev_metadata;
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struct voltage_policy_metadata volt_policy_metadata;
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@@ -90,16 +90,6 @@ struct voltage_rail {
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u32 current_volt_uv;
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};
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int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g);
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int nvgpu_volt_dev_sw_setup(struct gk20a *g);
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int nvgpu_volt_dev_pmu_setup(struct gk20a *g);
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int nvgpu_volt_policy_sw_setup(struct gk20a *g);
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int nvgpu_volt_policy_pmu_setup(struct gk20a *g);
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int nvgpu_volt_rail_sw_setup(struct gk20a *g);
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int nvgpu_volt_rail_pmu_setup(struct gk20a *g);
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u8 nvgpu_volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain);
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int nvgpu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_uv);
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u8 nvgpu_volt_get_vmargin_ps35(struct gk20a *g);
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@@ -109,5 +99,9 @@ u8 nvgpu_volt_rail_vbios_volt_domain_convert_to_internal
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(struct gk20a *g, u8 vbios_volt_domain);
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void nvgpu_pmu_volt_rpc_handler(struct gk20a *g, struct nv_pmu_rpc_header *rpc);
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int nvgpu_volt_get_curr_volt_ps35(struct gk20a *g, u32 *vcurr_uv);
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int nvgpu_pmu_volt_sw_setup(struct gk20a *g);
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void nvgpu_pmu_volt_deinit(struct gk20a *g);
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int nvgpu_pmu_volt_init(struct gk20a *g);
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int nvgpu_pmu_volt_pmu_setup(struct gk20a *g);
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#endif /* NVGPU_PMU_VOLT_H */
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