From 14f268563a41d9c3e7040316ffc49f277adfd5fe Mon Sep 17 00:00:00 2001 From: Vedashree Vidwans Date: Thu, 27 Feb 2020 14:00:52 -0800 Subject: [PATCH] gpu: nvgpu: add gr.zbc hal for nvgpu_next Add gr.zbc hal for nvgpu_next Jira NVGPU-5084 Change-Id: I678dac83ea67818e1b657b22840f3f4a04584ba8 Signed-off-by: Vedashree Vidwans Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2304195 Tested-by: mobile promotions Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Seshendra Gadagottu Reviewed-by: Seema Khowala Reviewed-by: automaticguardword Reviewed-by: Vinod Gopalakrishnakurup Reviewed-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/gr/zbc.c | 8 ++++++++ drivers/gpu/nvgpu/include/nvgpu/gops_gr.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/nvgpu/common/gr/zbc.c b/drivers/gpu/nvgpu/common/gr/zbc.c index 1f3a46c6d..42788da9e 100644 --- a/drivers/gpu/nvgpu/common/gr/zbc.c +++ b/drivers/gpu/nvgpu/common/gr/zbc.c @@ -177,6 +177,14 @@ int nvgpu_gr_zbc_add_color(struct gk20a *g, struct nvgpu_gr_zbc *zbc, /* update l2 table */ g->ops.ltc.set_zbc_color_entry(g, color_val->color_l2, index); +#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) + /* update crop table */ + if (g->ops.gr.zbc.set_crop_zbc_color_clear_value != NULL) { + g->ops.gr.zbc.set_crop_zbc_color_clear_value(g, + color_val->color_l2, index); + } +#endif + /* update local copy */ for (i = 0; i < NVGPU_GR_ZBC_COLOR_VALUE_SIZE; i++) { zbc->zbc_col_tbl[index].color_l2[i] = color_val->color_l2[i]; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops_gr.h b/drivers/gpu/nvgpu/include/nvgpu/gops_gr.h index 7c1e5f228..c0487842e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops_gr.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops_gr.h @@ -948,6 +948,9 @@ struct gops_gr_zbc { struct nvgpu_gr_zbc_entry *s_val, u32 index); u32 (*get_gpcs_swdx_dss_zbc_c_format_reg)(struct gk20a *g); u32 (*get_gpcs_swdx_dss_zbc_z_format_reg)(struct gk20a *g); +#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) +#include "include/nvgpu/nvgpu_next_gops_gr_zbc.h" +#endif }; struct gops_gr_zcull { int (*init_zcull_hw)(struct gk20a *g,