From 153daf7adfff68f8718eff3d4960b294f7019bb2 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Tue, 19 Feb 2019 11:45:50 +0530 Subject: [PATCH] gpu: nvgpu: Fix MISRA 10.6 violations in nvlink MISRA rule 10.6 does not allow assigning of composite expression to an object with wider essential type. Fix 10.6 violations in nvlink code by changing the data-type or by type-casting. JIRA NVGPU-1921 Change-Id: I2d661ca7960e49ebc062c4eb8817004f73297cf5 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/2022881 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/nvlink/intr_and_err_handling_gv100.c | 3 ++- drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/common/nvlink/intr_and_err_handling_gv100.c b/drivers/gpu/nvgpu/common/nvlink/intr_and_err_handling_gv100.c index 48a283384..9631b5e00 100644 --- a/drivers/gpu/nvgpu/common/nvlink/intr_and_err_handling_gv100.c +++ b/drivers/gpu/nvgpu/common/nvlink/intr_and_err_handling_gv100.c @@ -253,7 +253,8 @@ static void gv100_nvlink_minion_isr(struct gk20a *g) { minion_minion_intr_nonfatal_f(1)); } - links = minion_minion_intr_link_v(intr) & g->nvlink.enabled_links; + links = minion_minion_intr_link_v(intr) & + (unsigned long) g->nvlink.enabled_links; if (links != 0UL) { for_each_set_bit(bit, &links, NVLINK_MAX_LINKS_SW) { diff --git a/drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c b/drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c index e58c0a814..15bb96423 100644 --- a/drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c +++ b/drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c @@ -507,7 +507,7 @@ int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask) struct nvgpu_timeout timeout; u32 pad_ctrl = 0U; u32 swap_ctrl = 0U; - u32 pll_id; + u8 pll_id; unsigned long bit; reg = gk20a_readl(g, trim_sys_nvlink_uphy_cfg_r());