From 157b43ed16dffe7baf253eb5455ac4a23ac4d13b Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Wed, 24 Apr 2019 14:45:00 -0700 Subject: [PATCH] gpu: nvgpu: clean ramfc dependencies Remove ramfc dependencies on fifo hw header. Added the following HALs: - fifo.get_runlist_timeslice - fifo.get_pb_timeslice Jira NVGPU-3199 Change-Id: I1bdd4ee5e4008676df514b9d8563e862d1d68e33 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/2104539 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 13 +++++++++++++ drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 2 ++ drivers/gpu/nvgpu/hal/fifo/ramfc_gk20a.c | 9 ++------- drivers/gpu/nvgpu/hal/fifo/ramfc_tu104.c | 1 - drivers/gpu/nvgpu/hal/init/hal_gm20b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gp10b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gv100.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 2 ++ drivers/gpu/nvgpu/hal/init/hal_tu104.c | 2 ++ drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 2 ++ 10 files changed, 29 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 358afbaf3..475e7d879 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -142,3 +142,16 @@ int gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma) return 0; } + +u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g) +{ + return fifo_runlist_timeslice_timeout_128_f() | + fifo_runlist_timeslice_timescale_3_f() | + fifo_runlist_timeslice_enable_true_f(); +} + +u32 gk20a_fifo_get_pb_timeslice(struct gk20a *g) { + return fifo_pb_timeslice_timeout_16_f() | + fifo_pb_timeslice_timescale_0_f() | + fifo_pb_timeslice_enable_true_f(); +} diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index c33308892..5d36d18f8 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -245,5 +245,7 @@ static inline void gk20a_fifo_profile_snapshot( u32 gk20a_fifo_default_timeslice_us(struct gk20a *g); int gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma); +u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g); +u32 gk20a_fifo_get_pb_timeslice(struct gk20a *g); #endif /* FIFO_GK20A_H */ diff --git a/drivers/gpu/nvgpu/hal/fifo/ramfc_gk20a.c b/drivers/gpu/nvgpu/hal/fifo/ramfc_gk20a.c index fb8ab5b4e..15653f369 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ramfc_gk20a.c +++ b/drivers/gpu/nvgpu/hal/fifo/ramfc_gk20a.c @@ -29,7 +29,6 @@ #include "ramfc_gk20a.h" -#include #include int gk20a_ramfc_commit_userd(struct channel_gk20a *ch) @@ -93,14 +92,10 @@ int gk20a_ramfc_setup(struct channel_gk20a *ch, u64 gpfifo_base, g->ops.pbdma.acquire_val(pbdma_acquire_timeout)); nvgpu_mem_wr32(g, mem, ram_fc_runlist_timeslice_w(), - fifo_runlist_timeslice_timeout_128_f() | - fifo_runlist_timeslice_timescale_3_f() | - fifo_runlist_timeslice_enable_true_f()); + g->ops.fifo.get_runlist_timeslice(g)); nvgpu_mem_wr32(g, mem, ram_fc_pb_timeslice_w(), - fifo_pb_timeslice_timeout_16_f() | - fifo_pb_timeslice_timescale_0_f() | - fifo_pb_timeslice_enable_true_f()); + g->ops.fifo.get_pb_timeslice(g)); nvgpu_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(ch->chid)); diff --git a/drivers/gpu/nvgpu/hal/fifo/ramfc_tu104.c b/drivers/gpu/nvgpu/hal/fifo/ramfc_tu104.c index fa6592a62..4c7d50730 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ramfc_tu104.c +++ b/drivers/gpu/nvgpu/hal/fifo/ramfc_tu104.c @@ -31,7 +31,6 @@ #include "hal/fifo/ramfc_gk20a.h" #include "hal/fifo/ramfc_tu104.h" -#include #include int tu104_ramfc_setup(struct channel_gk20a *ch, u64 gpfifo_base, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c index 2d3bfba85..47d3905c7 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gm20b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gm20b.c @@ -693,6 +693,8 @@ static const struct gpu_ops gm20b_ops = { .get_mmu_fault_client_desc = gk20a_fifo_get_mmu_fault_client_desc, .get_mmu_fault_gpc_desc = gm20b_fifo_get_mmu_fault_gpc_desc, + .get_runlist_timeslice = gk20a_fifo_get_runlist_timeslice, + .get_pb_timeslice = gk20a_fifo_get_pb_timeslice, .is_mmu_fault_pending = gk20a_fifo_is_mmu_fault_pending, }, .engine = { diff --git a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c index 9e89d71ff..6fbb06317 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gp10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gp10b.c @@ -760,6 +760,8 @@ static const struct gpu_ops gp10b_ops = { .get_mmu_fault_client_desc = gp10b_fifo_get_mmu_fault_client_desc, .get_mmu_fault_gpc_desc = gm20b_fifo_get_mmu_fault_gpc_desc, + .get_runlist_timeslice = gk20a_fifo_get_runlist_timeslice, + .get_pb_timeslice = gk20a_fifo_get_pb_timeslice, .is_mmu_fault_pending = gk20a_fifo_is_mmu_fault_pending, }, .engine = { diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv100.c b/drivers/gpu/nvgpu/hal/init/hal_gv100.c index 0ce0b5c63..9c6170133 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv100.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv100.c @@ -940,6 +940,8 @@ static const struct gpu_ops gv100_ops = { .get_mmu_fault_desc = NULL, .get_mmu_fault_client_desc = NULL, .get_mmu_fault_gpc_desc = NULL, + .get_runlist_timeslice = gk20a_fifo_get_runlist_timeslice, + .get_pb_timeslice = gk20a_fifo_get_pb_timeslice, .mmu_fault_id_to_pbdma_id = gv11b_fifo_mmu_fault_id_to_pbdma_id, }, .engine = { diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 48fcc61bb..9686b4315 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -913,6 +913,8 @@ static const struct gpu_ops gv11b_ops = { .get_mmu_fault_desc = NULL, .get_mmu_fault_client_desc = NULL, .get_mmu_fault_gpc_desc = NULL, + .get_runlist_timeslice = gk20a_fifo_get_runlist_timeslice, + .get_pb_timeslice = gk20a_fifo_get_pb_timeslice, .mmu_fault_id_to_pbdma_id = gv11b_fifo_mmu_fault_id_to_pbdma_id, }, .engine = { diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 646c3e708..0c6fa7f64 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -975,6 +975,8 @@ static const struct gpu_ops tu104_ops = { .get_mmu_fault_desc = NULL, .get_mmu_fault_client_desc = NULL, .get_mmu_fault_gpc_desc = NULL, + .get_runlist_timeslice = gk20a_fifo_get_runlist_timeslice, + .get_pb_timeslice = gk20a_fifo_get_pb_timeslice, .mmu_fault_id_to_pbdma_id = gv11b_fifo_mmu_fault_id_to_pbdma_id, }, .engine = { diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 0b727736b..c1d86f82e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -1035,6 +1035,8 @@ struct gpu_ops { void (*get_mmu_fault_client_desc)( struct mmu_fault_info *mmfault); void (*get_mmu_fault_gpc_desc)(struct mmu_fault_info *mmfault); + u32 (*get_runlist_timeslice)(struct gk20a *g); + u32 (*get_pb_timeslice)(struct gk20a *g); bool (*is_mmu_fault_pending)(struct gk20a *g); u32 (*mmu_fault_id_to_pbdma_id)(struct gk20a *g, u32 mmu_fault_id);