From 17c479ac4748c951018dddedefd3f4179ca921f2 Mon Sep 17 00:00:00 2001
From: Sagar Kamble <skamble@nvidia.com>
Date: Sat, 20 Apr 2019 20:29:29 +0530
Subject: [PATCH] gpu: nvgpu: address CCM deviations for pmu_validate_cmd

pmu_validate_cmd CC value was higher than 10. Prepare new functions
pmu_validate_in_out_payload and pmu_validate_rpc_payload to
seggregate the validation checks.

JIRA NVGPU-3194

Change-Id: Ic1532b42c08a00d990077e71e1a13a4382be88d9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2101940
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
---
 drivers/gpu/nvgpu/common/pmu/ipc/pmu_cmd.c | 69 +++++++++++++++-------
 drivers/gpu/nvgpu/include/nvgpu/pmu.h      | 15 +++--
 2 files changed, 57 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/nvgpu/common/pmu/ipc/pmu_cmd.c b/drivers/gpu/nvgpu/common/pmu/ipc/pmu_cmd.c
index 4561b0d87..4223ba208 100644
--- a/drivers/gpu/nvgpu/common/pmu/ipc/pmu_cmd.c
+++ b/drivers/gpu/nvgpu/common/pmu/ipc/pmu_cmd.c
@@ -37,18 +37,61 @@
 #include <nvgpu/pmu/fw.h>
 #include <nvgpu/pmu/allocator.h>
 
+static bool pmu_validate_in_out_payload(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
+					struct pmu_in_out_payload_desc *payload)
+{
+	u32 size;
+
+	if (payload->offset != 0U && payload->buf == NULL) {
+		return false;
+	}
+
+	if (payload->buf == NULL) {
+		return true;
+	}
+
+	if (payload->size == 0U) {
+		return false;
+	}
+
+	size = PMU_CMD_HDR_SIZE;
+	size += payload->offset;
+	size += pmu->fw.ops.get_allocation_struct_size(pmu);
+
+	if (size > cmd->hdr.size) {
+		return false;
+	}
+
+	return true;
+}
+
+static bool pmu_validate_rpc_payload(struct pmu_payload *payload)
+{
+	if (payload->rpc.prpc == NULL) {
+		return true;
+	}
+
+	if (payload->rpc.size_rpc == 0U) {
+		goto invalid_cmd;
+	}
+
+	return true;
+
+invalid_cmd:
+
+	return false;
+}
+
 static bool pmu_validate_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
 			struct pmu_payload *payload, u32 queue_id)
 {
 	struct gk20a *g = gk20a_from_pmu(pmu);
 	u32 queue_size;
-	u32 in_size, out_size;
 
 	if (!PMU_IS_SW_COMMAND_QUEUE(queue_id)) {
 		goto invalid_cmd;
 	}
 
-
 	if (cmd->hdr.size < PMU_CMD_HDR_SIZE) {
 		goto invalid_cmd;
 	}
@@ -72,31 +115,15 @@ static bool pmu_validate_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd,
 		goto invalid_cmd;
 	}
 
-	if ((payload->in.buf != NULL && payload->in.size == 0U) ||
-	    (payload->out.buf != NULL && payload->out.size == 0U) ||
-		(payload->rpc.prpc != NULL && payload->rpc.size_rpc == 0U)) {
+	if (!pmu_validate_in_out_payload(pmu, cmd, &payload->in)) {
 		goto invalid_cmd;
 	}
 
-	in_size = PMU_CMD_HDR_SIZE;
-	if (payload->in.buf != NULL) {
-		in_size += payload->in.offset;
-		in_size += pmu->fw.ops.get_allocation_struct_size(pmu);
-	}
-
-	out_size = PMU_CMD_HDR_SIZE;
-	if (payload->out.buf != NULL) {
-		out_size += payload->out.offset;
-		out_size += pmu->fw.ops.get_allocation_struct_size(pmu);
-	}
-
-	if (in_size > cmd->hdr.size || out_size > cmd->hdr.size) {
+	if (!pmu_validate_in_out_payload(pmu, cmd, &payload->out)) {
 		goto invalid_cmd;
 	}
 
-
-	if ((payload->in.offset != 0U && payload->in.buf == NULL) ||
-	    (payload->out.offset != 0U && payload->out.buf == NULL)) {
+	if (!pmu_validate_rpc_payload(payload)) {
 		goto invalid_cmd;
 	}
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
index 5142156e8..3ceca1c31 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h
@@ -95,13 +95,16 @@ struct pmu_rpc_desc {
 	u16 size_scratch;
 };
 
+struct pmu_in_out_payload_desc {
+	void *buf;
+	u32 offset;
+	u32 size;
+	u32 fb_size;
+};
+
 struct pmu_payload {
-	struct {
-		void *buf;
-		u32 offset;
-		u32 size;
-		u32 fb_size;
-	} in, out;
+	struct pmu_in_out_payload_desc in;
+	struct pmu_in_out_payload_desc out;
 	struct pmu_rpc_desc rpc;
 };