From 19a8adeae1c9b747289e60ae97c532bdf16efd0b Mon Sep 17 00:00:00 2001 From: Antony Clince Alex Date: Tue, 29 Mar 2022 08:35:06 +0000 Subject: [PATCH] gpu: nvgpu: prof: add new resource type Add new profiler resource type NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER. Introduce regops HAL get_hwpm_pc_sampler_register_ranges to get allowlist for PC_SAMPLER resources. Re-generate allowlist files to include register ranges for PC_SAMPLER resources. Update uapi header to advertise new resource type NVGPU_PROFILER_PM_RESOURCE_ARG_PC_SAMPLER. Bug 3408536 Change-Id: I7009ef822665771eed727da48ef1e89dcc6b9c4b Signed-off-by: Antony Clince Alex Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2689057 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Deepak Nibade GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/profiler/profiler.c | 16 + drivers/gpu/nvgpu/hal/init/hal_ga10b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_tu104.c | 1 + .../gpu/nvgpu/hal/regops/allowlist_ga100.c | 317 ++++++++++++++---- .../gpu/nvgpu/hal/regops/allowlist_ga100.h | 4 +- .../gpu/nvgpu/hal/regops/allowlist_ga10b.c | 20 ++ .../gpu/nvgpu/hal/regops/allowlist_ga10b.h | 2 + .../gpu/nvgpu/hal/regops/allowlist_gv11b.c | 16 + .../gpu/nvgpu/hal/regops/allowlist_gv11b.h | 4 +- .../gpu/nvgpu/hal/regops/allowlist_tu104.c | 48 +++ .../gpu/nvgpu/hal/regops/allowlist_tu104.h | 4 +- .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c | 1 + .../gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c | 1 + .../gpu/nvgpu/include/nvgpu/gops/debugger.h | 2 + .../gpu/nvgpu/include/nvgpu/pm_reservation.h | 3 +- .../nvgpu/include/nvgpu/regops_allowlist.h | 3 +- drivers/gpu/nvgpu/os/linux/ioctl_prof.c | 14 + include/uapi/linux/nvgpu.h | 1 + 19 files changed, 381 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/nvgpu/common/profiler/profiler.c b/drivers/gpu/nvgpu/common/profiler/profiler.c index e4b97184b..7e4465b0c 100644 --- a/drivers/gpu/nvgpu/common/profiler/profiler.c +++ b/drivers/gpu/nvgpu/common/profiler/profiler.c @@ -234,6 +234,11 @@ int nvgpu_profiler_pm_resource_reserve(struct nvgpu_profiler_object *prof, NVGPU_DBG_REG_OP_TYPE_GLOBAL; } + if (pm_resource == NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER) { + prof->reg_op_type[NVGPU_HWPM_REGISTER_TYPE_PC_SAMPLER] = + NVGPU_DBG_REG_OP_TYPE_GR_CTX; + } + nvgpu_log(g, gpu_dbg_prof, "Granted reservation for profiler handle %u, resource %u, scope %u", prof->prof_handle, pm_resource, prof->scope); @@ -913,6 +918,11 @@ static u32 get_pm_resource_register_range_map_entry_count(struct nvgpu_profiler_ count += range_count; } + if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER]) { + g->ops.regops.get_hwpm_pc_sampler_register_ranges(&range_count); + count += range_count; + } + return count; } @@ -1013,6 +1023,12 @@ static int nvgpu_profiler_build_regops_allowlist(struct nvgpu_profiler_object *p NVGPU_HWPM_REGISTER_TYPE_HWPM_PMA_CHANNEL); } + if (prof->reserved[NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER]) { + range = g->ops.regops.get_hwpm_pc_sampler_register_ranges(&range_count); + add_range_to_map(range, range_count, map, &map_index, + NVGPU_HWPM_REGISTER_TYPE_PC_SAMPLER); + } + add_test_range_to_map(g, map, &map_index, NVGPU_HWPM_REGISTER_TYPE_TEST); nvgpu_log(g, gpu_dbg_prof, "Allowlist map created successfully for handle %u", diff --git a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c index 83b6aa5ce..86658a105 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_ga10b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_ga10b.c @@ -1438,6 +1438,7 @@ static const struct gops_regops ga10b_ops_regops = { .get_hwpm_perfmon_register_ranges = ga10b_get_hwpm_perfmon_register_ranges, .get_hwpm_router_register_ranges = ga10b_get_hwpm_router_register_ranges, .get_hwpm_pma_channel_register_ranges = ga10b_get_hwpm_pma_channel_register_ranges, + .get_hwpm_pc_sampler_register_ranges = ga10b_get_hwpm_pc_sampler_register_ranges, .get_hwpm_pma_trigger_register_ranges = ga10b_get_hwpm_pma_trigger_register_ranges, .get_smpc_register_ranges = ga10b_get_smpc_register_ranges, .get_cau_register_ranges = ga10b_get_cau_register_ranges, diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 57969b635..d9dd75672 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -1234,6 +1234,7 @@ static const struct gops_regops gv11b_ops_regops = { .get_hwpm_router_register_ranges = gv11b_get_hwpm_router_register_ranges, .get_hwpm_pma_channel_register_ranges = gv11b_get_hwpm_pma_channel_register_ranges, .get_hwpm_pma_trigger_register_ranges = gv11b_get_hwpm_pma_trigger_register_ranges, + .get_hwpm_pc_sampler_register_ranges = gv11b_get_hwpm_pc_sampler_register_ranges, .get_smpc_register_ranges = gv11b_get_smpc_register_ranges, .get_cau_register_ranges = NULL, .get_hwpm_perfmux_register_ranges = gv11b_get_hwpm_perfmux_register_ranges, diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 274a1ea9d..5c6ae4e46 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -1300,6 +1300,7 @@ static const struct gops_regops tu104_ops_regops = { .get_hwpm_router_register_ranges = tu104_get_hwpm_router_register_ranges, .get_hwpm_pma_channel_register_ranges = tu104_get_hwpm_pma_channel_register_ranges, .get_hwpm_pma_trigger_register_ranges = tu104_get_hwpm_pma_trigger_register_ranges, + .get_hwpm_pc_sampler_register_ranges = tu104_get_hwpm_pc_sampler_register_ranges, .get_smpc_register_ranges = tu104_get_smpc_register_ranges, .get_cau_register_ranges = tu104_get_cau_register_ranges, .get_hwpm_perfmux_register_ranges = tu104_get_hwpm_perfmux_register_ranges, diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.c b/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.c index 88178c28c..b94a9d41e 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.c +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.c @@ -380,10 +380,12 @@ static const struct nvgpu_pm_resource_register_range ga100_hwpm_router_register_ }; static const struct nvgpu_pm_resource_register_range ga100_hwpm_pma_channel_register_ranges[] = { + {0x0024a00c, 0x0024a00c}, {0x0024a610, 0x0024a628}, {0x0024a634, 0x0024a658}, {0x0024a730, 0x0024a734}, {0x0024a00c, 0x0024a00c}, + {0x0024a75c, 0x0024a75c}, }; static const struct nvgpu_pm_resource_register_range ga100_hwpm_pma_trigger_register_ranges[] = { @@ -753,486 +755,575 @@ static const struct nvgpu_pm_resource_register_range ga100_hwpm_perfmux_register {0x0041a0a8, 0x0041a0a8}, {0x0041a8a0, 0x0041a8a8}, {0x00504054, 0x00504054}, + {0x005041ac, 0x005041ac}, + {0x005041ec, 0x005041ec}, {0x005042b0, 0x005042b0}, {0x00504304, 0x00504304}, - {0x005043dc, 0x005043dc}, {0x0050440c, 0x0050440c}, {0x00504664, 0x00504664}, {0x00504854, 0x00504854}, + {0x005049ac, 0x005049ac}, + {0x005049ec, 0x005049ec}, {0x00504ab0, 0x00504ab0}, {0x00504b04, 0x00504b04}, - {0x00504bdc, 0x00504bdc}, {0x00504c0c, 0x00504c0c}, {0x00504e64, 0x00504e64}, {0x00505054, 0x00505054}, + {0x005051ac, 0x005051ac}, + {0x005051ec, 0x005051ec}, {0x005052b0, 0x005052b0}, {0x00505304, 0x00505304}, - {0x005053dc, 0x005053dc}, {0x0050540c, 0x0050540c}, {0x00505664, 0x00505664}, {0x00505854, 0x00505854}, + {0x005059ac, 0x005059ac}, + {0x005059ec, 0x005059ec}, {0x00505ab0, 0x00505ab0}, {0x00505b04, 0x00505b04}, - {0x00505bdc, 0x00505bdc}, {0x00505c0c, 0x00505c0c}, {0x00505e64, 0x00505e64}, {0x00506054, 0x00506054}, + {0x005061ac, 0x005061ac}, + {0x005061ec, 0x005061ec}, {0x005062b0, 0x005062b0}, {0x00506304, 0x00506304}, - {0x005063dc, 0x005063dc}, {0x0050640c, 0x0050640c}, {0x00506664, 0x00506664}, {0x00506854, 0x00506854}, + {0x005069ac, 0x005069ac}, + {0x005069ec, 0x005069ec}, {0x00506ab0, 0x00506ab0}, {0x00506b04, 0x00506b04}, - {0x00506bdc, 0x00506bdc}, {0x00506c0c, 0x00506c0c}, {0x00506e64, 0x00506e64}, {0x00507054, 0x00507054}, + {0x005071ac, 0x005071ac}, + {0x005071ec, 0x005071ec}, {0x005072b0, 0x005072b0}, {0x00507304, 0x00507304}, - {0x005073dc, 0x005073dc}, {0x0050740c, 0x0050740c}, {0x00507664, 0x00507664}, {0x00507854, 0x00507854}, + {0x005079ac, 0x005079ac}, + {0x005079ec, 0x005079ec}, {0x00507ab0, 0x00507ab0}, {0x00507b04, 0x00507b04}, - {0x00507bdc, 0x00507bdc}, {0x00507c0c, 0x00507c0c}, {0x00507e64, 0x00507e64}, {0x0050c054, 0x0050c054}, + {0x0050c1ac, 0x0050c1ac}, + {0x0050c1ec, 0x0050c1ec}, {0x0050c2b0, 0x0050c2b0}, {0x0050c304, 0x0050c304}, - {0x0050c3dc, 0x0050c3dc}, {0x0050c40c, 0x0050c40c}, {0x0050c664, 0x0050c664}, {0x0050c854, 0x0050c854}, + {0x0050c9ac, 0x0050c9ac}, + {0x0050c9ec, 0x0050c9ec}, {0x0050cab0, 0x0050cab0}, {0x0050cb04, 0x0050cb04}, - {0x0050cbdc, 0x0050cbdc}, {0x0050cc0c, 0x0050cc0c}, {0x0050ce64, 0x0050ce64}, {0x0050d054, 0x0050d054}, + {0x0050d1ac, 0x0050d1ac}, + {0x0050d1ec, 0x0050d1ec}, {0x0050d2b0, 0x0050d2b0}, {0x0050d304, 0x0050d304}, - {0x0050d3dc, 0x0050d3dc}, {0x0050d40c, 0x0050d40c}, {0x0050d664, 0x0050d664}, {0x0050d854, 0x0050d854}, + {0x0050d9ac, 0x0050d9ac}, + {0x0050d9ec, 0x0050d9ec}, {0x0050dab0, 0x0050dab0}, {0x0050db04, 0x0050db04}, - {0x0050dbdc, 0x0050dbdc}, {0x0050dc0c, 0x0050dc0c}, {0x0050de64, 0x0050de64}, {0x0050e054, 0x0050e054}, + {0x0050e1ac, 0x0050e1ac}, + {0x0050e1ec, 0x0050e1ec}, {0x0050e2b0, 0x0050e2b0}, {0x0050e304, 0x0050e304}, - {0x0050e3dc, 0x0050e3dc}, {0x0050e40c, 0x0050e40c}, {0x0050e664, 0x0050e664}, {0x0050e854, 0x0050e854}, + {0x0050e9ac, 0x0050e9ac}, + {0x0050e9ec, 0x0050e9ec}, {0x0050eab0, 0x0050eab0}, {0x0050eb04, 0x0050eb04}, - {0x0050ebdc, 0x0050ebdc}, {0x0050ec0c, 0x0050ec0c}, {0x0050ee64, 0x0050ee64}, {0x0050f054, 0x0050f054}, + {0x0050f1ac, 0x0050f1ac}, + {0x0050f1ec, 0x0050f1ec}, {0x0050f2b0, 0x0050f2b0}, {0x0050f304, 0x0050f304}, - {0x0050f3dc, 0x0050f3dc}, {0x0050f40c, 0x0050f40c}, {0x0050f664, 0x0050f664}, {0x0050f854, 0x0050f854}, + {0x0050f9ac, 0x0050f9ac}, + {0x0050f9ec, 0x0050f9ec}, {0x0050fab0, 0x0050fab0}, {0x0050fb04, 0x0050fb04}, - {0x0050fbdc, 0x0050fbdc}, {0x0050fc0c, 0x0050fc0c}, {0x0050fe64, 0x0050fe64}, {0x00514054, 0x00514054}, + {0x005141ac, 0x005141ac}, + {0x005141ec, 0x005141ec}, {0x005142b0, 0x005142b0}, {0x00514304, 0x00514304}, - {0x005143dc, 0x005143dc}, {0x0051440c, 0x0051440c}, {0x00514664, 0x00514664}, {0x00514854, 0x00514854}, + {0x005149ac, 0x005149ac}, + {0x005149ec, 0x005149ec}, {0x00514ab0, 0x00514ab0}, {0x00514b04, 0x00514b04}, - {0x00514bdc, 0x00514bdc}, {0x00514c0c, 0x00514c0c}, {0x00514e64, 0x00514e64}, {0x00515054, 0x00515054}, + {0x005151ac, 0x005151ac}, + {0x005151ec, 0x005151ec}, {0x005152b0, 0x005152b0}, {0x00515304, 0x00515304}, - {0x005153dc, 0x005153dc}, {0x0051540c, 0x0051540c}, {0x00515664, 0x00515664}, {0x00515854, 0x00515854}, + {0x005159ac, 0x005159ac}, + {0x005159ec, 0x005159ec}, {0x00515ab0, 0x00515ab0}, {0x00515b04, 0x00515b04}, - {0x00515bdc, 0x00515bdc}, {0x00515c0c, 0x00515c0c}, {0x00515e64, 0x00515e64}, {0x00516054, 0x00516054}, + {0x005161ac, 0x005161ac}, + {0x005161ec, 0x005161ec}, {0x005162b0, 0x005162b0}, {0x00516304, 0x00516304}, - {0x005163dc, 0x005163dc}, {0x0051640c, 0x0051640c}, {0x00516664, 0x00516664}, {0x00516854, 0x00516854}, + {0x005169ac, 0x005169ac}, + {0x005169ec, 0x005169ec}, {0x00516ab0, 0x00516ab0}, {0x00516b04, 0x00516b04}, - {0x00516bdc, 0x00516bdc}, {0x00516c0c, 0x00516c0c}, {0x00516e64, 0x00516e64}, {0x00517054, 0x00517054}, + {0x005171ac, 0x005171ac}, + {0x005171ec, 0x005171ec}, {0x005172b0, 0x005172b0}, {0x00517304, 0x00517304}, - {0x005173dc, 0x005173dc}, {0x0051740c, 0x0051740c}, {0x00517664, 0x00517664}, {0x00517854, 0x00517854}, + {0x005179ac, 0x005179ac}, + {0x005179ec, 0x005179ec}, {0x00517ab0, 0x00517ab0}, {0x00517b04, 0x00517b04}, - {0x00517bdc, 0x00517bdc}, {0x00517c0c, 0x00517c0c}, {0x00517e64, 0x00517e64}, {0x0051c054, 0x0051c054}, + {0x0051c1ac, 0x0051c1ac}, + {0x0051c1ec, 0x0051c1ec}, {0x0051c2b0, 0x0051c2b0}, {0x0051c304, 0x0051c304}, - {0x0051c3dc, 0x0051c3dc}, {0x0051c40c, 0x0051c40c}, {0x0051c664, 0x0051c664}, {0x0051c854, 0x0051c854}, + {0x0051c9ac, 0x0051c9ac}, + {0x0051c9ec, 0x0051c9ec}, {0x0051cab0, 0x0051cab0}, {0x0051cb04, 0x0051cb04}, - {0x0051cbdc, 0x0051cbdc}, {0x0051cc0c, 0x0051cc0c}, {0x0051ce64, 0x0051ce64}, {0x0051d054, 0x0051d054}, + {0x0051d1ac, 0x0051d1ac}, + {0x0051d1ec, 0x0051d1ec}, {0x0051d2b0, 0x0051d2b0}, {0x0051d304, 0x0051d304}, - {0x0051d3dc, 0x0051d3dc}, {0x0051d40c, 0x0051d40c}, {0x0051d664, 0x0051d664}, {0x0051d854, 0x0051d854}, + {0x0051d9ac, 0x0051d9ac}, + {0x0051d9ec, 0x0051d9ec}, {0x0051dab0, 0x0051dab0}, {0x0051db04, 0x0051db04}, - {0x0051dbdc, 0x0051dbdc}, {0x0051dc0c, 0x0051dc0c}, {0x0051de64, 0x0051de64}, {0x0051e054, 0x0051e054}, + {0x0051e1ac, 0x0051e1ac}, + {0x0051e1ec, 0x0051e1ec}, {0x0051e2b0, 0x0051e2b0}, {0x0051e304, 0x0051e304}, - {0x0051e3dc, 0x0051e3dc}, {0x0051e40c, 0x0051e40c}, {0x0051e664, 0x0051e664}, {0x0051e854, 0x0051e854}, + {0x0051e9ac, 0x0051e9ac}, + {0x0051e9ec, 0x0051e9ec}, {0x0051eab0, 0x0051eab0}, {0x0051eb04, 0x0051eb04}, - {0x0051ebdc, 0x0051ebdc}, {0x0051ec0c, 0x0051ec0c}, {0x0051ee64, 0x0051ee64}, {0x0051f054, 0x0051f054}, + {0x0051f1ac, 0x0051f1ac}, + {0x0051f1ec, 0x0051f1ec}, {0x0051f2b0, 0x0051f2b0}, {0x0051f304, 0x0051f304}, - {0x0051f3dc, 0x0051f3dc}, {0x0051f40c, 0x0051f40c}, {0x0051f664, 0x0051f664}, {0x0051f854, 0x0051f854}, + {0x0051f9ac, 0x0051f9ac}, + {0x0051f9ec, 0x0051f9ec}, {0x0051fab0, 0x0051fab0}, {0x0051fb04, 0x0051fb04}, - {0x0051fbdc, 0x0051fbdc}, {0x0051fc0c, 0x0051fc0c}, {0x0051fe64, 0x0051fe64}, {0x00524054, 0x00524054}, + {0x005241ac, 0x005241ac}, + {0x005241ec, 0x005241ec}, {0x005242b0, 0x005242b0}, {0x00524304, 0x00524304}, - {0x005243dc, 0x005243dc}, {0x0052440c, 0x0052440c}, {0x00524664, 0x00524664}, {0x00524854, 0x00524854}, + {0x005249ac, 0x005249ac}, + {0x005249ec, 0x005249ec}, {0x00524ab0, 0x00524ab0}, {0x00524b04, 0x00524b04}, - {0x00524bdc, 0x00524bdc}, {0x00524c0c, 0x00524c0c}, {0x00524e64, 0x00524e64}, {0x00525054, 0x00525054}, + {0x005251ac, 0x005251ac}, + {0x005251ec, 0x005251ec}, {0x005252b0, 0x005252b0}, {0x00525304, 0x00525304}, - {0x005253dc, 0x005253dc}, {0x0052540c, 0x0052540c}, {0x00525664, 0x00525664}, {0x00525854, 0x00525854}, + {0x005259ac, 0x005259ac}, + {0x005259ec, 0x005259ec}, {0x00525ab0, 0x00525ab0}, {0x00525b04, 0x00525b04}, - {0x00525bdc, 0x00525bdc}, {0x00525c0c, 0x00525c0c}, {0x00525e64, 0x00525e64}, {0x00526054, 0x00526054}, + {0x005261ac, 0x005261ac}, + {0x005261ec, 0x005261ec}, {0x005262b0, 0x005262b0}, {0x00526304, 0x00526304}, - {0x005263dc, 0x005263dc}, {0x0052640c, 0x0052640c}, {0x00526664, 0x00526664}, {0x00526854, 0x00526854}, + {0x005269ac, 0x005269ac}, + {0x005269ec, 0x005269ec}, {0x00526ab0, 0x00526ab0}, {0x00526b04, 0x00526b04}, - {0x00526bdc, 0x00526bdc}, {0x00526c0c, 0x00526c0c}, {0x00526e64, 0x00526e64}, {0x00527054, 0x00527054}, + {0x005271ac, 0x005271ac}, + {0x005271ec, 0x005271ec}, {0x005272b0, 0x005272b0}, {0x00527304, 0x00527304}, - {0x005273dc, 0x005273dc}, {0x0052740c, 0x0052740c}, {0x00527664, 0x00527664}, {0x00527854, 0x00527854}, + {0x005279ac, 0x005279ac}, + {0x005279ec, 0x005279ec}, {0x00527ab0, 0x00527ab0}, {0x00527b04, 0x00527b04}, - {0x00527bdc, 0x00527bdc}, {0x00527c0c, 0x00527c0c}, {0x00527e64, 0x00527e64}, {0x0052c054, 0x0052c054}, + {0x0052c1ac, 0x0052c1ac}, + {0x0052c1ec, 0x0052c1ec}, {0x0052c2b0, 0x0052c2b0}, {0x0052c304, 0x0052c304}, - {0x0052c3dc, 0x0052c3dc}, {0x0052c40c, 0x0052c40c}, {0x0052c664, 0x0052c664}, {0x0052c854, 0x0052c854}, + {0x0052c9ac, 0x0052c9ac}, + {0x0052c9ec, 0x0052c9ec}, {0x0052cab0, 0x0052cab0}, {0x0052cb04, 0x0052cb04}, - {0x0052cbdc, 0x0052cbdc}, {0x0052cc0c, 0x0052cc0c}, {0x0052ce64, 0x0052ce64}, {0x0052d054, 0x0052d054}, + {0x0052d1ac, 0x0052d1ac}, + {0x0052d1ec, 0x0052d1ec}, {0x0052d2b0, 0x0052d2b0}, {0x0052d304, 0x0052d304}, - {0x0052d3dc, 0x0052d3dc}, {0x0052d40c, 0x0052d40c}, {0x0052d664, 0x0052d664}, {0x0052d854, 0x0052d854}, + {0x0052d9ac, 0x0052d9ac}, + {0x0052d9ec, 0x0052d9ec}, {0x0052dab0, 0x0052dab0}, {0x0052db04, 0x0052db04}, - {0x0052dbdc, 0x0052dbdc}, {0x0052dc0c, 0x0052dc0c}, {0x0052de64, 0x0052de64}, {0x0052e054, 0x0052e054}, + {0x0052e1ac, 0x0052e1ac}, + {0x0052e1ec, 0x0052e1ec}, {0x0052e2b0, 0x0052e2b0}, {0x0052e304, 0x0052e304}, - {0x0052e3dc, 0x0052e3dc}, {0x0052e40c, 0x0052e40c}, {0x0052e664, 0x0052e664}, {0x0052e854, 0x0052e854}, + {0x0052e9ac, 0x0052e9ac}, + {0x0052e9ec, 0x0052e9ec}, {0x0052eab0, 0x0052eab0}, {0x0052eb04, 0x0052eb04}, - {0x0052ebdc, 0x0052ebdc}, {0x0052ec0c, 0x0052ec0c}, {0x0052ee64, 0x0052ee64}, {0x0052f054, 0x0052f054}, + {0x0052f1ac, 0x0052f1ac}, + {0x0052f1ec, 0x0052f1ec}, {0x0052f2b0, 0x0052f2b0}, {0x0052f304, 0x0052f304}, - {0x0052f3dc, 0x0052f3dc}, {0x0052f40c, 0x0052f40c}, {0x0052f664, 0x0052f664}, {0x0052f854, 0x0052f854}, + {0x0052f9ac, 0x0052f9ac}, + {0x0052f9ec, 0x0052f9ec}, {0x0052fab0, 0x0052fab0}, {0x0052fb04, 0x0052fb04}, - {0x0052fbdc, 0x0052fbdc}, {0x0052fc0c, 0x0052fc0c}, {0x0052fe64, 0x0052fe64}, {0x00534054, 0x00534054}, + {0x005341ac, 0x005341ac}, + {0x005341ec, 0x005341ec}, {0x005342b0, 0x005342b0}, {0x00534304, 0x00534304}, - {0x005343dc, 0x005343dc}, {0x0053440c, 0x0053440c}, {0x00534664, 0x00534664}, {0x00534854, 0x00534854}, + {0x005349ac, 0x005349ac}, + {0x005349ec, 0x005349ec}, {0x00534ab0, 0x00534ab0}, {0x00534b04, 0x00534b04}, - {0x00534bdc, 0x00534bdc}, {0x00534c0c, 0x00534c0c}, {0x00534e64, 0x00534e64}, {0x00535054, 0x00535054}, + {0x005351ac, 0x005351ac}, + {0x005351ec, 0x005351ec}, {0x005352b0, 0x005352b0}, {0x00535304, 0x00535304}, - {0x005353dc, 0x005353dc}, {0x0053540c, 0x0053540c}, {0x00535664, 0x00535664}, {0x00535854, 0x00535854}, + {0x005359ac, 0x005359ac}, + {0x005359ec, 0x005359ec}, {0x00535ab0, 0x00535ab0}, {0x00535b04, 0x00535b04}, - {0x00535bdc, 0x00535bdc}, {0x00535c0c, 0x00535c0c}, {0x00535e64, 0x00535e64}, {0x00536054, 0x00536054}, + {0x005361ac, 0x005361ac}, + {0x005361ec, 0x005361ec}, {0x005362b0, 0x005362b0}, {0x00536304, 0x00536304}, - {0x005363dc, 0x005363dc}, {0x0053640c, 0x0053640c}, {0x00536664, 0x00536664}, {0x00536854, 0x00536854}, + {0x005369ac, 0x005369ac}, + {0x005369ec, 0x005369ec}, {0x00536ab0, 0x00536ab0}, {0x00536b04, 0x00536b04}, - {0x00536bdc, 0x00536bdc}, {0x00536c0c, 0x00536c0c}, {0x00536e64, 0x00536e64}, {0x00537054, 0x00537054}, + {0x005371ac, 0x005371ac}, + {0x005371ec, 0x005371ec}, {0x005372b0, 0x005372b0}, {0x00537304, 0x00537304}, - {0x005373dc, 0x005373dc}, {0x0053740c, 0x0053740c}, {0x00537664, 0x00537664}, {0x00537854, 0x00537854}, + {0x005379ac, 0x005379ac}, + {0x005379ec, 0x005379ec}, {0x00537ab0, 0x00537ab0}, {0x00537b04, 0x00537b04}, - {0x00537bdc, 0x00537bdc}, {0x00537c0c, 0x00537c0c}, {0x00537e64, 0x00537e64}, {0x0053c054, 0x0053c054}, + {0x0053c1ac, 0x0053c1ac}, + {0x0053c1ec, 0x0053c1ec}, {0x0053c2b0, 0x0053c2b0}, {0x0053c304, 0x0053c304}, - {0x0053c3dc, 0x0053c3dc}, {0x0053c40c, 0x0053c40c}, {0x0053c664, 0x0053c664}, {0x0053c854, 0x0053c854}, + {0x0053c9ac, 0x0053c9ac}, + {0x0053c9ec, 0x0053c9ec}, {0x0053cab0, 0x0053cab0}, {0x0053cb04, 0x0053cb04}, - {0x0053cbdc, 0x0053cbdc}, {0x0053cc0c, 0x0053cc0c}, {0x0053ce64, 0x0053ce64}, {0x0053d054, 0x0053d054}, + {0x0053d1ac, 0x0053d1ac}, + {0x0053d1ec, 0x0053d1ec}, {0x0053d2b0, 0x0053d2b0}, {0x0053d304, 0x0053d304}, - {0x0053d3dc, 0x0053d3dc}, {0x0053d40c, 0x0053d40c}, {0x0053d664, 0x0053d664}, {0x0053d854, 0x0053d854}, + {0x0053d9ac, 0x0053d9ac}, + {0x0053d9ec, 0x0053d9ec}, {0x0053dab0, 0x0053dab0}, {0x0053db04, 0x0053db04}, - {0x0053dbdc, 0x0053dbdc}, {0x0053dc0c, 0x0053dc0c}, {0x0053de64, 0x0053de64}, {0x0053e054, 0x0053e054}, + {0x0053e1ac, 0x0053e1ac}, + {0x0053e1ec, 0x0053e1ec}, {0x0053e2b0, 0x0053e2b0}, {0x0053e304, 0x0053e304}, - {0x0053e3dc, 0x0053e3dc}, {0x0053e40c, 0x0053e40c}, {0x0053e664, 0x0053e664}, {0x0053e854, 0x0053e854}, + {0x0053e9ac, 0x0053e9ac}, + {0x0053e9ec, 0x0053e9ec}, {0x0053eab0, 0x0053eab0}, {0x0053eb04, 0x0053eb04}, - {0x0053ebdc, 0x0053ebdc}, {0x0053ec0c, 0x0053ec0c}, {0x0053ee64, 0x0053ee64}, {0x0053f054, 0x0053f054}, + {0x0053f1ac, 0x0053f1ac}, + {0x0053f1ec, 0x0053f1ec}, {0x0053f2b0, 0x0053f2b0}, {0x0053f304, 0x0053f304}, - {0x0053f3dc, 0x0053f3dc}, {0x0053f40c, 0x0053f40c}, {0x0053f664, 0x0053f664}, {0x0053f854, 0x0053f854}, + {0x0053f9ac, 0x0053f9ac}, + {0x0053f9ec, 0x0053f9ec}, {0x0053fab0, 0x0053fab0}, {0x0053fb04, 0x0053fb04}, - {0x0053fbdc, 0x0053fbdc}, {0x0053fc0c, 0x0053fc0c}, {0x0053fe64, 0x0053fe64}, {0x00419854, 0x00419854}, + {0x004199ac, 0x004199ac}, + {0x004199ec, 0x004199ec}, {0x00419ab0, 0x00419ab0}, {0x00419b04, 0x00419b04}, - {0x00419bdc, 0x00419bdc}, {0x00419c0c, 0x00419c0c}, {0x00419e64, 0x00419e64}, {0x0041c054, 0x0041c054}, + {0x0041c1ac, 0x0041c1ac}, + {0x0041c1ec, 0x0041c1ec}, {0x0041c2b0, 0x0041c2b0}, {0x0041c304, 0x0041c304}, - {0x0041c3dc, 0x0041c3dc}, {0x0041c40c, 0x0041c40c}, {0x0041c664, 0x0041c664}, {0x0041c854, 0x0041c854}, + {0x0041c9ac, 0x0041c9ac}, + {0x0041c9ec, 0x0041c9ec}, {0x0041cab0, 0x0041cab0}, {0x0041cb04, 0x0041cb04}, - {0x0041cbdc, 0x0041cbdc}, {0x0041cc0c, 0x0041cc0c}, {0x0041ce64, 0x0041ce64}, {0x0041d054, 0x0041d054}, + {0x0041d1ac, 0x0041d1ac}, + {0x0041d1ec, 0x0041d1ec}, {0x0041d2b0, 0x0041d2b0}, {0x0041d304, 0x0041d304}, - {0x0041d3dc, 0x0041d3dc}, {0x0041d40c, 0x0041d40c}, {0x0041d664, 0x0041d664}, {0x0041d854, 0x0041d854}, + {0x0041d9ac, 0x0041d9ac}, + {0x0041d9ec, 0x0041d9ec}, {0x0041dab0, 0x0041dab0}, {0x0041db04, 0x0041db04}, - {0x0041dbdc, 0x0041dbdc}, {0x0041dc0c, 0x0041dc0c}, {0x0041de64, 0x0041de64}, {0x0041e054, 0x0041e054}, + {0x0041e1ac, 0x0041e1ac}, + {0x0041e1ec, 0x0041e1ec}, {0x0041e2b0, 0x0041e2b0}, {0x0041e304, 0x0041e304}, - {0x0041e3dc, 0x0041e3dc}, {0x0041e40c, 0x0041e40c}, {0x0041e664, 0x0041e664}, {0x0041e854, 0x0041e854}, + {0x0041e9ac, 0x0041e9ac}, + {0x0041e9ec, 0x0041e9ec}, {0x0041eab0, 0x0041eab0}, {0x0041eb04, 0x0041eb04}, - {0x0041ebdc, 0x0041ebdc}, {0x0041ec0c, 0x0041ec0c}, {0x0041ee64, 0x0041ee64}, {0x0041f054, 0x0041f054}, + {0x0041f1ac, 0x0041f1ac}, + {0x0041f1ec, 0x0041f1ec}, {0x0041f2b0, 0x0041f2b0}, {0x0041f304, 0x0041f304}, - {0x0041f3dc, 0x0041f3dc}, {0x0041f40c, 0x0041f40c}, {0x0041f664, 0x0041f664}, {0x0041f854, 0x0041f854}, + {0x0041f9ac, 0x0041f9ac}, + {0x0041f9ec, 0x0041f9ec}, {0x0041fab0, 0x0041fab0}, {0x0041fb04, 0x0041fb04}, - {0x0041fbdc, 0x0041fbdc}, {0x0041fc0c, 0x0041fc0c}, {0x0041fe64, 0x0041fe64}, {0x00501854, 0x00501854}, + {0x005019ac, 0x005019ac}, + {0x005019ec, 0x005019ec}, {0x00501ab0, 0x00501ab0}, {0x00501b04, 0x00501b04}, {0x00501bdc, 0x00501bdc}, {0x00501c0c, 0x00501c0c}, {0x00501e64, 0x00501e64}, {0x00509854, 0x00509854}, + {0x005099ac, 0x005099ac}, + {0x005099ec, 0x005099ec}, {0x00509ab0, 0x00509ab0}, {0x00509b04, 0x00509b04}, {0x00509bdc, 0x00509bdc}, {0x00509c0c, 0x00509c0c}, {0x00509e64, 0x00509e64}, {0x00511854, 0x00511854}, + {0x005119ac, 0x005119ac}, + {0x005119ec, 0x005119ec}, {0x00511ab0, 0x00511ab0}, {0x00511b04, 0x00511b04}, {0x00511bdc, 0x00511bdc}, {0x00511c0c, 0x00511c0c}, {0x00511e64, 0x00511e64}, {0x00519854, 0x00519854}, + {0x005199ac, 0x005199ac}, + {0x005199ec, 0x005199ec}, {0x00519ab0, 0x00519ab0}, {0x00519b04, 0x00519b04}, {0x00519bdc, 0x00519bdc}, {0x00519c0c, 0x00519c0c}, {0x00519e64, 0x00519e64}, {0x00521854, 0x00521854}, + {0x005219ac, 0x005219ac}, + {0x005219ec, 0x005219ec}, {0x00521ab0, 0x00521ab0}, {0x00521b04, 0x00521b04}, {0x00521bdc, 0x00521bdc}, {0x00521c0c, 0x00521c0c}, {0x00521e64, 0x00521e64}, {0x00529854, 0x00529854}, + {0x005299ac, 0x005299ac}, + {0x005299ec, 0x005299ec}, {0x00529ab0, 0x00529ab0}, {0x00529b04, 0x00529b04}, {0x00529bdc, 0x00529bdc}, {0x00529c0c, 0x00529c0c}, {0x00529e64, 0x00529e64}, {0x00531854, 0x00531854}, + {0x005319ac, 0x005319ac}, + {0x005319ec, 0x005319ec}, {0x00531ab0, 0x00531ab0}, {0x00531b04, 0x00531b04}, {0x00531bdc, 0x00531bdc}, {0x00531c0c, 0x00531c0c}, {0x00531e64, 0x00531e64}, {0x00539854, 0x00539854}, + {0x005399ac, 0x005399ac}, + {0x005399ec, 0x005399ec}, {0x00539ab0, 0x00539ab0}, {0x00539b04, 0x00539b04}, {0x00539bdc, 0x00539bdc}, @@ -1359,12 +1450,14 @@ static const struct nvgpu_pm_resource_register_range ga100_hwpm_perfmux_register {0x00006000, 0x00006000}, {0x00006400, 0x00006400}, {0x00006800, 0x00006800}, + {0x0000a084, 0x0000a084}, {0x0000cc98, 0x0000cc98}, {0x000884e0, 0x000884e0}, {0x000884f4, 0x000884f4}, {0x0008e00c, 0x0008e00c}, {0x00100c18, 0x00100c20}, {0x00100c84, 0x00100c84}, + {0x00104030, 0x00104030}, {0x00105068, 0x00105068}, {0x00105128, 0x00105128}, {0x001051e8, 0x001051e8}, @@ -1385,6 +1478,8 @@ static const struct nvgpu_pm_resource_register_range ga100_hwpm_perfmux_register {0x00105d28, 0x00105d28}, {0x0010a0a8, 0x0010a0a8}, {0x0010a4f0, 0x0010a4f0}, + {0x00122228, 0x00122228}, + {0x00124228, 0x00124228}, {0x0013cc14, 0x0013cc14}, {0x0013cc24, 0x0013cc28}, {0x0013cc54, 0x0013cc54}, @@ -1427,6 +1522,74 @@ static const struct nvgpu_pm_resource_register_range ga100_hwpm_perfmux_register {0x0013cb94, 0x0013cb94}, }; +static const struct nvgpu_pm_resource_register_range ga100_hwpm_pc_sampler_register_ranges[] = { + {0x005043dc, 0x005043dc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x00509bdc, 0x00509bdc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x00509bdc, 0x00509bdc}, + {0x0050a3dc, 0x0050a3dc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x00509bdc, 0x00509bdc}, + {0x0050a3dc, 0x0050a3dc}, + {0x0050abdc, 0x0050abdc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x00509bdc, 0x00509bdc}, + {0x0050a3dc, 0x0050a3dc}, + {0x0050abdc, 0x0050abdc}, + {0x0050b3dc, 0x0050b3dc}, + {0x00419bdc, 0x00419bdc}, +}; + static const struct nvgpu_pm_resource_register_range ga100_cau_register_ranges[] = { {0x00504180, 0x005041b4}, {0x005041c0, 0x005041f4}, @@ -1712,6 +1875,14 @@ const struct nvgpu_pm_resource_register_range return ga100_hwpm_perfmux_register_ranges; } +const struct nvgpu_pm_resource_register_range + *ga100_get_hwpm_pc_sampler_register_ranges(u32 *count) +{ + *count = (u32)(sizeof(ga100_hwpm_pc_sampler_register_ranges) / + sizeof(ga100_hwpm_pc_sampler_register_ranges[0])); + return ga100_hwpm_pc_sampler_register_ranges; +} + const struct nvgpu_pm_resource_register_range *ga100_get_cau_register_ranges(u32 *count) { diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.h b/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.h index 2ed7767b4..32e4717df 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.h +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_ga100.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -55,6 +55,8 @@ const struct nvgpu_pm_resource_register_range *ga100_get_smpc_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *ga100_get_hwpm_perfmux_register_ranges(u32 *count); +const struct nvgpu_pm_resource_register_range + *ga100_get_hwpm_pc_sampler_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *ga100_get_cau_register_ranges(u32 *count); diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.c b/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.c index fb73bd74d..bbdfed447 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.c +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.c @@ -652,6 +652,18 @@ static const struct nvgpu_pm_resource_register_range ga10b_hwpm_perfmux_register {0x0013cb94, 0x0013cb94}, }; +static const struct nvgpu_pm_resource_register_range ga10b_hwpm_pc_sampler_register_ranges[] = { + {0x005043dc, 0x005043dc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00419bdc, 0x00419bdc}, +}; + static const struct nvgpu_pm_resource_register_range ga10b_cau_register_ranges[] = { {0x00504180, 0x005041ac}, {0x005041b4, 0x005041e8}, @@ -820,6 +832,14 @@ const struct nvgpu_pm_resource_register_range return ga10b_hwpm_perfmux_register_ranges; } +const struct nvgpu_pm_resource_register_range + *ga10b_get_hwpm_pc_sampler_register_ranges(u32 *count) +{ + *count = (u32)(sizeof(ga10b_hwpm_pc_sampler_register_ranges) / + sizeof(ga10b_hwpm_pc_sampler_register_ranges[0])); + return ga10b_hwpm_pc_sampler_register_ranges; +} + const struct nvgpu_pm_resource_register_range *ga10b_get_cau_register_ranges(u32 *count) { diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.h b/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.h index 2ba7cbb17..177506867 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.h +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_ga10b.h @@ -55,6 +55,8 @@ const struct nvgpu_pm_resource_register_range *ga10b_get_smpc_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *ga10b_get_hwpm_perfmux_register_ranges(u32 *count); +const struct nvgpu_pm_resource_register_range + *ga10b_get_hwpm_pc_sampler_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *ga10b_get_cau_register_ranges(u32 *count); diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.c b/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.c index 43460c32c..1aa51c2cc 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.c +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.c @@ -496,6 +496,14 @@ static const struct nvgpu_pm_resource_register_range gv11b_hwpm_perfmux_register {0x00900100, 0x00900100}, }; +static const struct nvgpu_pm_resource_register_range gv11b_hwpm_pc_sampler_register_ranges[] = { + {0x005043dc, 0x005043dc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x00419bdc, 0x00419bdc}, +}; + u32 gv11b_get_hwpm_perfmon_register_stride(void) { return 0x00000200; @@ -604,3 +612,11 @@ const struct nvgpu_pm_resource_register_range return gv11b_hwpm_perfmux_register_ranges; } +const struct nvgpu_pm_resource_register_range + *gv11b_get_hwpm_pc_sampler_register_ranges(u32 *count) +{ + *count = (u32)(sizeof(gv11b_hwpm_pc_sampler_register_ranges) / + sizeof(gv11b_hwpm_pc_sampler_register_ranges[0])); + return gv11b_hwpm_pc_sampler_register_ranges; +} + diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.h b/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.h index 07ec3ecbf..4626b26e5 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.h +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -53,5 +53,7 @@ const struct nvgpu_pm_resource_register_range *gv11b_get_smpc_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *gv11b_get_hwpm_perfmux_register_ranges(u32 *count); +const struct nvgpu_pm_resource_register_range + *gv11b_get_hwpm_pc_sampler_register_ranges(u32 *count); #endif /* NVGPU_GV11B_REGOPS_ALLOWLIST_H */ diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.c b/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.c index 3bcd0566a..e02069651 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.c +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.c @@ -1117,6 +1117,46 @@ static const struct nvgpu_pm_resource_register_range tu104_hwpm_perfmux_register {0x00a1ec70, 0x00a1ec74}, }; +static const struct nvgpu_pm_resource_register_range tu104_hwpm_pc_sampler_register_ranges[] = { + {0x005043dc, 0x005043dc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x00504bdc, 0x00504bdc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x005053dc, 0x005053dc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x00505bdc, 0x00505bdc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x005063dc, 0x005063dc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x00506bdc, 0x00506bdc}, + {0x005073dc, 0x005073dc}, + {0x00507bdc, 0x00507bdc}, + {0x005083dc, 0x005083dc}, + {0x00508bdc, 0x00508bdc}, + {0x005093dc, 0x005093dc}, + {0x00419bdc, 0x00419bdc}, +}; + static const struct nvgpu_pm_resource_register_range tu104_cau_register_ranges[] = { {0x00419980, 0x004199b4}, {0x004199c0, 0x004199f4}, @@ -1338,6 +1378,14 @@ const struct nvgpu_pm_resource_register_range return tu104_hwpm_perfmux_register_ranges; } +const struct nvgpu_pm_resource_register_range + *tu104_get_hwpm_pc_sampler_register_ranges(u32 *count) +{ + *count = (u32)(sizeof(tu104_hwpm_pc_sampler_register_ranges) / + sizeof(tu104_hwpm_pc_sampler_register_ranges[0])); + return tu104_hwpm_pc_sampler_register_ranges; +} + const struct nvgpu_pm_resource_register_range *tu104_get_cau_register_ranges(u32 *count) { diff --git a/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.h b/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.h index 60da56fe7..1190e697b 100644 --- a/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.h +++ b/drivers/gpu/nvgpu/hal/regops/allowlist_tu104.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -55,6 +55,8 @@ const struct nvgpu_pm_resource_register_range *tu104_get_smpc_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *tu104_get_hwpm_perfmux_register_ranges(u32 *count); +const struct nvgpu_pm_resource_register_range + *tu104_get_hwpm_pc_sampler_register_ranges(u32 *count); const struct nvgpu_pm_resource_register_range *tu104_get_cau_register_ranges(u32 *count); diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c index 0ca1533bc..7d06bd725 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_ga10b.c @@ -902,6 +902,7 @@ static const struct gops_regops vgpu_ga10b_ops_regops = { .get_hwpm_perfmon_register_ranges = ga10b_get_hwpm_perfmon_register_ranges, .get_hwpm_router_register_ranges = ga10b_get_hwpm_router_register_ranges, .get_hwpm_pma_channel_register_ranges = ga10b_get_hwpm_pma_channel_register_ranges, + .get_hwpm_pc_sampler_register_ranges = ga10b_get_hwpm_pc_sampler_register_ranges, .get_hwpm_pma_trigger_register_ranges = ga10b_get_hwpm_pma_trigger_register_ranges, .get_smpc_register_ranges = ga10b_get_smpc_register_ranges, .get_cau_register_ranges = ga10b_get_cau_register_ranges, diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c index 35b223792..fa7314a20 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c @@ -874,6 +874,7 @@ static const struct gops_regops vgpu_gv11b_ops_regops = { .get_hwpm_pma_channel_register_ranges = gv11b_get_hwpm_pma_channel_register_ranges, .get_hwpm_pma_trigger_register_ranges = gv11b_get_hwpm_pma_trigger_register_ranges, .get_smpc_register_ranges = gv11b_get_smpc_register_ranges, + .get_hwpm_pc_sampler_register_ranges = gv11b_get_hwpm_pc_sampler_register_ranges, .get_cau_register_ranges = NULL, .get_hwpm_perfmux_register_ranges = gv11b_get_hwpm_perfmux_register_ranges, }; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h b/drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h index 472d3dff4..8723581bf 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/debugger.h @@ -57,6 +57,8 @@ struct gops_regops { (*get_hwpm_router_register_ranges)(u32 *count); const struct nvgpu_pm_resource_register_range * (*get_hwpm_pma_channel_register_ranges)(u32 *count); + const struct nvgpu_pm_resource_register_range * + (*get_hwpm_pc_sampler_register_ranges)(u32 *count); const struct nvgpu_pm_resource_register_range * (*get_hwpm_pma_trigger_register_ranges)(u32 *count); const struct nvgpu_pm_resource_register_range * diff --git a/drivers/gpu/nvgpu/include/nvgpu/pm_reservation.h b/drivers/gpu/nvgpu/include/nvgpu/pm_reservation.h index 4d9c9d898..49fb4fa3a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pm_reservation.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pm_reservation.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -39,6 +39,7 @@ enum nvgpu_profiler_pm_resource_type { NVGPU_PROFILER_PM_RESOURCE_TYPE_HWPM_LEGACY, NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC, NVGPU_PROFILER_PM_RESOURCE_TYPE_PMA_STREAM, + NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER, NVGPU_PROFILER_PM_RESOURCE_TYPE_COUNT, }; diff --git a/drivers/gpu/nvgpu/include/nvgpu/regops_allowlist.h b/drivers/gpu/nvgpu/include/nvgpu/regops_allowlist.h index 69eb2ab07..a7c5e417c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/regops_allowlist.h +++ b/drivers/gpu/nvgpu/include/nvgpu/regops_allowlist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -38,6 +38,7 @@ enum nvgpu_pm_resource_hwpm_register_type { NVGPU_HWPM_REGISTER_TYPE_SMPC, NVGPU_HWPM_REGISTER_TYPE_CAU, NVGPU_HWPM_REGISTER_TYPE_HWPM_PMA_CHANNEL, + NVGPU_HWPM_REGISTER_TYPE_PC_SAMPLER, NVGPU_HWPM_REGISTER_TYPE_TEST, NVGPU_HWPM_REGISTER_TYPE_COUNT, }; diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_prof.c b/drivers/gpu/nvgpu/os/linux/ioctl_prof.c index d649ba0ed..0df3239a1 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_prof.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_prof.c @@ -267,6 +267,9 @@ static int nvgpu_prof_ioctl_get_pm_resource_type(u32 resource, case NVGPU_PROFILER_PM_RESOURCE_ARG_SMPC: *pm_resource = NVGPU_PROFILER_PM_RESOURCE_TYPE_SMPC; return 0; + case NVGPU_PROFILER_PM_RESOURCE_ARG_PC_SAMPLER: + *pm_resource = NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER; + return 0; default: break; } @@ -307,6 +310,17 @@ static int nvgpu_prof_ioctl_reserve_pm_resource(struct nvgpu_profiler_object *pr nvgpu_err(g, "SMPC global mode not supported"); return -EINVAL; } + /* + * PC_SAMPLER resources are always context switched with a GR + * context, so reservation scope is always context. This + * requires that profiler object is instantiated with a valid + * GR context. + */ + if ((pm_resource == NVGPU_PROFILER_PM_RESOURCE_TYPE_PC_SAMPLER) + && (prof->tsg == NULL)) { + nvgpu_err(g, "PC_SAMPLER reservation is only allowed wth context bound"); + return -EINVAL; + } if (flag_ctxsw) { prof->ctxsw[pm_resource] = true; } else { diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index 7b139f7dc..581cb8c46 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -621,6 +621,7 @@ struct nvgpu_profiler_bind_context_args { #define NVGPU_PROFILER_PM_RESOURCE_ARG_HWPM_LEGACY 0U #define NVGPU_PROFILER_PM_RESOURCE_ARG_SMPC 1U +#define NVGPU_PROFILER_PM_RESOURCE_ARG_PC_SAMPLER 2U struct nvgpu_profiler_reserve_pm_resource_args { __u32 resource; /* in: NVGPU_PROFILER_PM_RESOURCE_ARG_* resource to be reserved */