From 19c250e5693632f6b008ca3c957e60744a9f28b2 Mon Sep 17 00:00:00 2001 From: Sagar Kamble Date: Sat, 13 Jul 2019 23:09:19 +0530 Subject: [PATCH] gpu: nvgpu: update hw headers with static inlines There were following stale hw header files as their source script changes were not present. These still had the static inline functions. Deleted below files as they are not used: gk20a/hw_pri_ringstation_fbp_gk20a.h gp106/hw_gc6_gp106.h Regenerated with updated script changes: gv11b/hw_usermode_gv11b.h JIRA NVGPU-3733 Change-Id: I40b79b43b7f085c01858f3584fcf2c8928d62d13 Signed-off-by: Sagar Kamble Reviewed-on: https://git-master.nvidia.com/r/2152825 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions Tested-by: mobile promotions --- arch/nvgpu-gpu_hw.yaml | 2 - .../hw/gk20a/hw_pri_ringstation_fbp_gk20a.h | 231 ------------------ .../include/nvgpu/hw/gp106/hw_gc6_gp106.h | 62 ----- .../nvgpu/hw/gv11b/hw_usermode_gv11b.h | 52 ++-- 4 files changed, 14 insertions(+), 333 deletions(-) delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h delete mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_gc6_gp106.h diff --git a/arch/nvgpu-gpu_hw.yaml b/arch/nvgpu-gpu_hw.yaml index c8c0fe702..fb3173af2 100644 --- a/arch/nvgpu-gpu_hw.yaml +++ b/arch/nvgpu-gpu_hw.yaml @@ -23,7 +23,6 @@ headers: include/nvgpu/hw/gk20a/hw_perf_gk20a.h, include/nvgpu/hw/gk20a/hw_pram_gk20a.h, include/nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h, - include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h, include/nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h, include/nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h, include/nvgpu/hw/gk20a/hw_proj_gk20a.h, @@ -69,7 +68,6 @@ headers: include/nvgpu/hw/gp106/hw_fifo_gp106.h, include/nvgpu/hw/gp106/hw_flush_gp106.h, include/nvgpu/hw/gp106/hw_fuse_gp106.h, - include/nvgpu/hw/gp106/hw_gc6_gp106.h, include/nvgpu/hw/gp106/hw_gmmu_gp106.h, include/nvgpu/hw/gp106/hw_gr_gp106.h, include/nvgpu/hw/gp106/hw_ltc_gp106.h, diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h deleted file mode 100644 index 06e08bd55..000000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h +++ /dev/null @@ -1,231 +0,0 @@ -/* - * drivers/video/tegra/host/gk20a/hw_pri_ringstation_fbp_gk20a.h - * - * Copyright (c) 2012-2013, NVIDIA Corporation. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - - /* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ - -#ifndef __hw_pri_ringstation_fbp_gk20a_h__ -#define __hw_pri_ringstation_fbp_gk20a_h__ -/*This file is autogenerated. Do not edit. */ - -static inline u32 pri_ringstation_fbp_master_config_r(u32 i) -{ - return 0x00124300+((i)*4); -} -static inline u32 pri_ringstation_fbp_master_config__size_1_v(void) -{ - return 64; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_s(void) -{ - return 18; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_f(u32 v) -{ - return (v & 0x3ffff) << 0; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_m(void) -{ - return 0x3ffff << 0; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_v(u32 r) -{ - return (r >> 0) & 0x3ffff; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_i_v(void) -{ - return 0x00000064; -} -static inline u32 pri_ringstation_fbp_master_config_timeout_i_f(void) -{ - return 0x64; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_s(void) -{ - return 1; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_f(u32 v) -{ - return (v & 0x1) << 30; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_m(void) -{ - return 0x1 << 30; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_v(u32 r) -{ - return (r >> 30) & 0x1; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_error_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_error_f(void) -{ - return 0x0; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_soldier_on_v(void) -{ - return 0x00000001; -} -static inline u32 pri_ringstation_fbp_master_config_fs_action_soldier_on_f(void) -{ - return 0x40000000; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_s(void) -{ - return 1; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_f(u32 v) -{ - return (v & 0x1) << 31; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_m(void) -{ - return 0x1 << 31; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_v(u32 r) -{ - return (r >> 31) & 0x1; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_error_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_error_f(void) -{ - return 0x0; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_soldier_on_v(void) -{ - return 0x00000001; -} -static inline u32 pri_ringstation_fbp_master_config_reset_action_soldier_on_f(void) -{ - return 0x80000000; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_s(void) -{ - return 3; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_f(u32 v) -{ - return (v & 0x7) << 20; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_m(void) -{ - return 0x7 << 20; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_v(u32 r) -{ - return (r >> 20) & 0x7; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_i_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringstation_fbp_master_config_setup_clocks_i_f(void) -{ - return 0x0; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_s(void) -{ - return 3; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_f(u32 v) -{ - return (v & 0x7) << 24; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_m(void) -{ - return 0x7 << 24; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_v(u32 r) -{ - return (r >> 24) & 0x7; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_i_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringstation_fbp_master_config_wait_clocks_i_f(void) -{ - return 0x0; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_s(void) -{ - return 3; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_f(u32 v) -{ - return (v & 0x7) << 27; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_m(void) -{ - return 0x7 << 27; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_v(u32 r) -{ - return (r >> 27) & 0x7; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_i_v(void) -{ - return 0x00000000; -} -static inline u32 pri_ringstation_fbp_master_config_hold_clocks_i_f(void) -{ - return 0x0; -} - -#endif /* __hw_pri_ringstation_fbp_gk20a_h__ */ diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_gc6_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_gc6_gp106.h deleted file mode 100644 index 7a0d5b230..000000000 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_gc6_gp106.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -/* - * Function naming determines intended use: - * - * _r(void) : Returns the offset for register . - * - * _o(void) : Returns the offset for element . - * - * _w(void) : Returns the word offset for word (4 byte) element . - * - * __s(void) : Returns size of field of register in bits. - * - * __f(u32 v) : Returns a value based on 'v' which has been shifted - * and masked to place it at field of register . This value - * can be |'d with others to produce a full register value for - * register . - * - * __m(void) : Returns a mask for field of register . This - * value can be ~'d and then &'d to clear the value of field for - * register . - * - * ___f(void) : Returns the constant value after being shifted - * to place it at field of register . This value can be |'d - * with others to produce a full register value for . - * - * __v(u32 r) : Returns the value of field from a full register - * value 'r' after being shifted to place its LSB at bit 0. - * This value is suitable for direct comparison with other unshifted - * values appropriate for use in field of register . - * - * ___v(void) : Returns the constant value for defined for - * field of register . This value is suitable for direct - * comparison with unshifted values appropriate for use in field - * of register . - */ -#ifndef NVGPU_HW_GC6_GP106_H -#define NVGPU_HW_GC6_GP106_H -static inline u32 gc6_sci_strap_r(void) -{ - return 0x00010ebb0; -} -#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_usermode_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_usermode_gv11b.h index fb90719a1..0dc0e591d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_usermode_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_usermode_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,7 +20,7 @@ * DEALINGS IN THE SOFTWARE. */ /* - * Function naming determines intended use: + * Function/Macro naming determines intended use: * * _r(void) : Returns the offset for register . * @@ -56,40 +56,16 @@ #ifndef NVGPU_HW_USERMODE_GV11B_H #define NVGPU_HW_USERMODE_GV11B_H -static inline u32 usermode_cfg0_r(void) -{ - return 0x00810000; -} -static inline u32 usermode_cfg0_usermode_class_id_f(u32 v) -{ - return (v & 0xffff) << 0; -} -static inline u32 usermode_cfg0_usermode_class_id_value_v(void) -{ - return 0x0000c361; -} -static inline u32 usermode_time_0_r(void) -{ - return 0x00810080; -} -static inline u32 usermode_time_0_nsec_f(u32 v) -{ - return (v & 0x7ffffff) << 5; -} -static inline u32 usermode_time_1_r(void) -{ - return 0x00810084; -} -static inline u32 usermode_time_1_nsec_f(u32 v) -{ - return (v & 0x1fffffff) << 0; -} -static inline u32 usermode_notify_channel_pending_r(void) -{ - return 0x00810090; -} -static inline u32 usermode_notify_channel_pending_id_f(u32 v) -{ - return (v & 0xffffffff) << 0; -} +#include +#include + +#define usermode_cfg0_r() (0x00810000U) +#define usermode_cfg0_class_id_f(v) (((v)&0xffffU) << 0U) +#define usermode_cfg0_class_id_value_v() (0x0000c361U) +#define usermode_time_0_r() (0x00810080U) +#define usermode_time_0_nsec_f(v) (((v)&0x7ffffffU) << 5U) +#define usermode_time_1_r() (0x00810084U) +#define usermode_time_1_nsec_f(v) (((v)&0x1fffffffU) << 0U) +#define usermode_notify_channel_pending_r() (0x00810090U) +#define usermode_notify_channel_pending_id_f(v) (((v)&0xffffffffU) << 0U) #endif