From 1a2de585d16711730439dbb51e40ca198d9ad047 Mon Sep 17 00:00:00 2001 From: Scott Long Date: Wed, 4 Sep 2019 09:43:50 -0700 Subject: [PATCH] gpu: nvgpu: acr: fix misra 5.9 violation Advisory Rule 5.9 states that identifiers that define objects or functions with internal linkage should be unique. This change eliminates an Advisory Rule 5.9 violation in our acr code due to duplicate definitions of flcn64_set_dma() by placing a single inline version in flcnif_cmn.h. Jira NVGPU-3178 Change-Id: Id9171059ee490cbadd46204f520fccefc44669f7 Signed-off-by: Scott Long Reviewed-on: https://git-master.nvidia.com/r/2190074 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c | 6 ------ drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c | 6 ------ drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h | 6 ++++++ 3 files changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c index de6e12e7f..6f224c7c6 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c @@ -33,12 +33,6 @@ #include "acr_wpr.h" #include "acr_priv.h" -static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value) -{ - dma_addr->lo |= u64_lo32(value); - dma_addr->hi |= u64_hi32(value); -} - #ifdef CONFIG_NVGPU_LS_PMU int nvgpu_acr_lsf_pmu_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img) { diff --git a/drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c b/drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c index 2bc9b5cd6..f3f836757 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c +++ b/drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c @@ -35,12 +35,6 @@ #include "acr_bootstrap.h" #include "acr_sw_gv11b.h" -static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value) -{ - dma_addr->lo |= u64_lo32(value); - dma_addr->hi |= u64_hi32(value); -} - static void gv11b_acr_patch_wpr_info_to_ucode(struct gk20a *g, struct nvgpu_acr *acr, struct hs_acr *acr_desc, bool is_recovery) { diff --git a/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h b/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h index c6d8b97fe..f9589fb81 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h +++ b/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h @@ -33,6 +33,12 @@ struct falc_u64 { u32 hi; }; +static inline void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value) +{ + dma_addr->lo |= u64_lo32(value); + dma_addr->hi |= u64_hi32(value); +} + struct falc_dma_addr { u32 dma_base; /*