diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c index 866c4f68c..ad8b1576a 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c @@ -1,7 +1,7 @@ /* * GK20A Graphics * - * Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -2108,7 +2108,17 @@ int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state) int err = 0; u32 gpc, tpc, sm, sm_id; u32 global_mask; - u32 no_of_sm = g->ops.gr.init.get_no_of_sm(g); + u32 no_of_sm; + + if((g->ops.gr.init.get_no_of_sm == NULL) || + (g->ops.gr.intr.get_sm_no_lock_down_hww_global_esr_mask == NULL) || + (g->ops.gr.lock_down_sm == NULL) || + (g->ops.gr.bpt_reg_info == NULL) || + (g->ops.gr.sm_debugger_attached == NULL)) { + return -EINVAL; + } + + no_of_sm = g->ops.gr.init.get_no_of_sm(g); if (!g->ops.gr.sm_debugger_attached(g)) { nvgpu_err(g, @@ -2177,6 +2187,11 @@ int gr_gk20a_clear_sm_errors(struct gk20a *g) u32 global_esr; u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); + if ((g->ops.gr.intr.get_sm_hww_global_esr == NULL) || + (g->ops.gr.intr.clear_sm_hww == NULL)) { + return -EINVAL; + } + for (gpc = 0; gpc < nvgpu_gr_config_get_gpc_count(gr->config); gpc++) { /* check if any tpc has an exception */ diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c index 3ec2c2fd2..dcbc7ba3b 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2020, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2011-2021, NVIDIA Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -949,6 +949,10 @@ static int nvgpu_gpu_ioctl_has_any_exception( { u64 tpc_exception_en; + if (g->ops.gr.intr.tpc_enabled_exceptions == NULL) { + return -ENOSYS; + } + nvgpu_mutex_acquire(&g->dbg_sessions_lock); tpc_exception_en = g->ops.gr.intr.tpc_enabled_exceptions(g); nvgpu_mutex_release(&g->dbg_sessions_lock);