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gpu: nvgpu: avoid hard coded constants

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Replace the hard coded numeric constants in posix unit.

Jira NVGPU-4954

Change-Id: I9f57e2d60b44c942924c47a7e38c237c732b13b0
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289633
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2020-02-04 15:30:35 +05:30
committed by Alex Waterman
parent 9ca89fa97f
commit 1c1dca5d6f
6 changed files with 51 additions and 26 deletions
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31
drivers/gpu/nvgpu/include/nvgpu/posix/utils.h
View File

@@ -388,12 +388,19 @@ static inline u32 be32_to_cpu(u32 x)
static inline unsigned int nvgpu_posix_hweight8(uint8_t x)
{
unsigned int ret;
uint8_t result = ((U8(x) >> U8(1)) & U8(0x55));
const u8 mask1 = 0x55;
const u8 mask2 = 0x33;
const u8 mask3 = 0x0f;
const u8 shift1 = 1;
const u8 shift2 = 2;
const u8 shift4 = 4;
uint8_t result = ((U8(x) >> shift1) & mask1);
result = nvgpu_safe_sub_u8(x, result);
result = (result & U8(0x33)) + ((result >> U8(2)) & U8(0x33));
result = (result + (result >> U8(4))) & U8(0x0f);
result = (result & mask2) + ((result >> shift2) & mask2);
result = (result + (result >> shift4)) & mask3;
ret = (unsigned int)result;
return ret;
@@ -411,9 +418,11 @@ static inline unsigned int nvgpu_posix_hweight8(uint8_t x)
static inline unsigned int nvgpu_posix_hweight16(uint16_t x)
{
unsigned int ret;
const u8 mask = 0xff;
const u8 shift8 = 8;
ret = nvgpu_posix_hweight8((uint8_t)(x & U8(0xff)));
ret += nvgpu_posix_hweight8((uint8_t)((x >> U8(8)) & U8(0xff)));
ret = nvgpu_posix_hweight8((uint8_t)(x & mask));
ret += nvgpu_posix_hweight8((uint8_t)((x >> shift8) & mask));
return ret;
}
@@ -430,9 +439,11 @@ static inline unsigned int nvgpu_posix_hweight16(uint16_t x)
static inline unsigned int nvgpu_posix_hweight32(uint32_t x)
{
unsigned int ret;
const u16 mask = 0xffff;
const u16 shift16 = 16;
ret = nvgpu_posix_hweight16((uint16_t)(x & U16(0xffff)));
ret += nvgpu_posix_hweight16((uint16_t)((x >> U16(16)) & U16(0xffff)));
ret = nvgpu_posix_hweight16((uint16_t)(x & mask));
ret += nvgpu_posix_hweight16((uint16_t)((x >> shift16) & mask));
return ret;
}
@@ -450,9 +461,11 @@ static inline unsigned int nvgpu_posix_hweight64(uint64_t x)
{
unsigned int ret;
u32 lo, hi;
const u32 tmp0 = 0;
const u32 shift32 = 32;
lo = nvgpu_safe_cast_u64_to_u32(x & ~(u32)0);
hi = nvgpu_safe_cast_u64_to_u32(x >> 32) & ~(u32)0;
lo = nvgpu_safe_cast_u64_to_u32(x & ~tmp0);
hi = nvgpu_safe_cast_u64_to_u32(x >> shift32) & ~tmp0;
ret = nvgpu_posix_hweight32(lo);
ret += nvgpu_posix_hweight32(hi);

5
drivers/gpu/nvgpu/os/posix/bitmap.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -34,6 +34,7 @@
unsigned long nvgpu_posix_ffs(unsigned long word)
{
int ret = 0;
const int maxvalue = 64;
if ((word & (unsigned long) LONG_MAX) != 0UL) {
ret = __builtin_ffsl(
@@ -42,7 +43,7 @@ unsigned long nvgpu_posix_ffs(unsigned long word)
} else {
NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 14_3), "Bug 2615925")
if (word > (unsigned long) LONG_MAX) {
ret = (int) 64;
ret = maxvalue;
}
}

3
drivers/gpu/nvgpu/os/posix/bug.c
View File

@@ -79,8 +79,9 @@ static void nvgpu_posix_dump_stack(int skip_frames)
void dump_stack(void)
{
const int frames = 2;
/* Skip this function and nvgpu_posix_dump_stack() */
nvgpu_posix_dump_stack(2);
nvgpu_posix_dump_stack(frames);
}
static void nvgpu_bug_init(void)

22
drivers/gpu/nvgpu/os/posix/cond.c
View File

@@ -172,7 +172,11 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond)
int nvgpu_cond_timedwait(struct nvgpu_cond *c, unsigned int *ms)
{
int ret;
const int err_ret = -1;
const unsigned int tmp0 = 0;
s64 t_start_ns, t_ns;
const s64 const_ns = 1000000000L;
const s64 const_ms = 1000000L;
struct timespec ts;
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
@@ -186,27 +190,27 @@ int nvgpu_cond_timedwait(struct nvgpu_cond *c, unsigned int *ms)
return pthread_cond_wait(&c->cond, &c->mutex.lock.mutex);
}
if (clock_gettime(CLOCK_MONOTONIC, &ts) == -1) {
if (clock_gettime(CLOCK_MONOTONIC, &ts) == err_ret) {
return -EFAULT;
}
t_start_ns = nvgpu_safe_mult_s64(ts.tv_sec, 1000000000);
t_start_ns = nvgpu_safe_mult_s64(ts.tv_sec, const_ns);
t_start_ns = nvgpu_safe_add_s64(t_start_ns, ts.tv_nsec);
t_ns = (s64)(*ms);
t_ns *= 1000000;
t_ns = nvgpu_safe_mult_s64(t_ns, const_ms);
t_ns = nvgpu_safe_add_s64(t_ns, t_start_ns);
ts.tv_sec = t_ns / 1000000000;
ts.tv_nsec = t_ns % 1000000000;
ts.tv_sec = t_ns / const_ns;
ts.tv_nsec = t_ns % const_ns;
ret = pthread_cond_timedwait(&c->cond, &c->mutex.lock.mutex, &ts);
if (ret == 0) {
if (clock_gettime(CLOCK_MONOTONIC, &ts) != -1) {
t_ns = nvgpu_safe_mult_s64(ts.tv_sec, 1000000000);
if (clock_gettime(CLOCK_MONOTONIC, &ts) != err_ret) {
t_ns = nvgpu_safe_mult_s64(ts.tv_sec, const_ns);
t_ns = nvgpu_safe_add_s64(t_ns, ts.tv_nsec);
t_ns = nvgpu_safe_sub_s64(t_ns, t_start_ns);
t_ns /= 1000000;
t_ns /= const_ms;
if ((s64)*ms <= t_ns) {
*ms = 0;
*ms = tmp0;
} else {
*ms -= (unsigned int)t_ns;
}

14
drivers/gpu/nvgpu/os/posix/kmem.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -34,11 +34,15 @@
#include <nvgpu/posix/posix-fault-injection.h>
#endif
#ifdef __NVGPU_UNIT_TEST__
#define CACHE_NAME_LEN 128
#endif
struct nvgpu_kmem_cache {
struct gk20a *g;
size_t size;
#ifdef __NVGPU_UNIT_TEST__
char name[128];
char name[CACHE_NAME_LEN];
#endif
};
@@ -147,6 +151,7 @@ void *nvgpu_kmalloc_impl(struct gk20a *g, size_t size, void *ip)
void *nvgpu_kzalloc_impl(struct gk20a *g, size_t size, void *ip)
{
void *ptr;
const size_t num = 1;
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
if (nvgpu_posix_fault_injection_handle_call(
@@ -154,7 +159,7 @@ void *nvgpu_kzalloc_impl(struct gk20a *g, size_t size, void *ip)
return NULL;
}
#endif
ptr = calloc(1, size);
ptr = calloc(num, size);
if (ptr == NULL) {
nvgpu_warn(NULL, "calloc returns NULL");
@@ -167,6 +172,7 @@ void *nvgpu_kzalloc_impl(struct gk20a *g, size_t size, void *ip)
void *nvgpu_kcalloc_impl(struct gk20a *g, size_t n, size_t size, void *ip)
{
void *ptr;
const size_t num = 1;
#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
if (nvgpu_posix_fault_injection_handle_call(
@@ -174,7 +180,7 @@ void *nvgpu_kcalloc_impl(struct gk20a *g, size_t n, size_t size, void *ip)
return NULL;
}
#endif
ptr = calloc(1, (nvgpu_safe_mult_u64(n, size)));
ptr = calloc(num, (nvgpu_safe_mult_u64(n, size)));
if (ptr == NULL) {
nvgpu_warn(NULL, "calloc returns NULL");

2
drivers/gpu/nvgpu/os/posix/timers.c
View File

@@ -161,7 +161,7 @@ static void nvgpu_usleep(unsigned int usecs)
void nvgpu_udelay(unsigned int usecs)
{
if (usecs >= (unsigned int) 1000) {
if (usecs >= (unsigned int) USEC_PER_MSEC) {
nvgpu_usleep(usecs);
} else {
nvgpu_delay_usecs(usecs);