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gpu: nvgpu: channel: make chid u32

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The chid member of the channel_gk20a struct was being used as a unsigned
value. By being declared as an int, it was causing MISRA 10.3 violations
for implicit assignment of different types.

JIRA NVGPU-647

Change-Id: I7477fad6f0c837cf7ede1dba803158b1dda717af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918470
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2018-10-03 14:52:49 -04:00
committed by mobile promotions
parent f5cac144a0
commit 1c7bb9b538
5 changed files with 5 additions and 5 deletions
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2
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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@@ -3367,7 +3367,7 @@ u32 *gk20a_runlist_construct_locked(struct fifo_gk20a *f,
/* add runnable channels bound to this TSG */
nvgpu_list_for_each_entry(ch, &tsg->ch_list,
channel_gk20a, ch_entry) {
if (!test_bit(ch->chid,
if (!test_bit((int)ch->chid,
runlist->active_channels)) {
continue;
}