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gpu: nvgpu: use TSG recover API
Use TSG specific API gk20a_fifo_recover_tsg() in following cases : - IOCTL_CHANNEL_FORCE_RESET to force reset a channel in TSG, reset all the channels - handle pbdma intr while resetting in case of pbdma intr, if channel is part of TSG, recover entire TSG - TSG preempt failure when TSG preempt times out, use TSG recover API Use preempt_tsg() API to preempt if channel is part of TSG Add below two generic APIs which will take care of preempting/ recovering either of channel or TSG as required gk20a_fifo_preempt() gk20a_fifo_force_reset_ch() Bug 1470692 Change-Id: I8d46e252af79136be85a9a2accf8b51bd924ca8c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/497875 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Dan Willemsen
parent
2f232348e6
commit
1c7dcfdeef
@@ -147,6 +147,7 @@ void gk20a_fifo_nonstall_isr(struct gk20a *g);
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int gk20a_fifo_preempt_channel(struct gk20a *g, u32 hw_chid);
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int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid);
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int gk20a_fifo_preempt(struct gk20a *g, struct channel_gk20a *ch);
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int gk20a_fifo_enable_engine_activity(struct gk20a *g,
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struct fifo_engine_info_gk20a *eng_info);
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@@ -164,6 +165,7 @@ bool gk20a_fifo_mmu_fault_pending(struct gk20a *g);
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void gk20a_fifo_recover(struct gk20a *g, u32 engine_ids, bool verbose);
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void gk20a_fifo_recover_ch(struct gk20a *g, u32 hw_chid, bool verbose);
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void gk20a_fifo_recover_tsg(struct gk20a *g, u32 tsgid, bool verbose);
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int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch, bool verbose);
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int gk20a_init_fifo_reset_enable_hw(struct gk20a *g);
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void gk20a_init_fifo(struct gpu_ops *gops);
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