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gpu: nvgpu: Add SM diversity support

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To achieve permanent fault coverage, the CTAs launched by
each kernel in the mission and redundant contexts must execute on
different hardware resources. This feature proposes modifications
in the software to modify the virtual SM id to TPC mapping across
the mission and redundant contexts. The virtual SM identifier to TPC
mapping is done by nvgpu when setting up the patch context.

The recommendation for the redundant setting is to offset the
assignment by one TPC, and not by one GPC. This will ensure that both
GPC and TPC diversity. The SM and Quadrant diversity will happen
naturally. For kernels with few CTAs, the diversity is guaranteed
to be 100%. In case of completely random CTA allocation,
e.g. large number of CTAs in the waiting queue, the diversity is
1 - 1/#SM, or 87.5% for GV11B, 97.9% for TU104.

Added NvGpu CFLAGS to enable/disable the SM diversity support
"CONFIG_NVGPU_SM_DIVERSITY".

This support is only enabled on gv11b and tu104 QNX non safety build.

JIRA NVGPU-4685

Change-Id: I8e3eaa72d8cf7aff97f61e4c2abd10b2afe0fe8b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268026
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This commit is contained in:
Lakshmanan M
2019-12-24 12:16:35 +05:30
committed by Alex Waterman
parent 7601d1c620
commit 1c991a58af
27 changed files with 504 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/gpu/nvgpu/os/linux/ioctl_channel.c
View File

@@ -1,7 +1,7 @@
/*
* GK20A Graphics channel
*
* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -1140,6 +1140,24 @@ long gk20a_channel_ioctl(struct file *filp,
__func__, cmd);
break;
}
#ifdef CONFIG_NVGPU_SM_DIVERSITY
{
struct nvgpu_tsg *tsg = nvgpu_tsg_from_ch(ch);
if (tsg == NULL) {
err = -EINVAL;
break;
}
if (nvgpu_gr_ctx_get_sm_diversity_config(tsg->gr_ctx) ==
NVGPU_INVALID_SM_CONFIG_ID) {
nvgpu_gr_ctx_set_sm_diversity_config(tsg->gr_ctx,
NVGPU_DEFAULT_SM_DIVERSITY_CONFIG);
}
}
#endif
err = nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num, args->flags);
gk20a_idle(ch->g);
break;