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gpu: nvgpu: fix compile error of new compile flags

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Preparing to push hvrtos gpu server changes which requires bellow CFLAGS:
        -Werror -Wall -Wextra \
        -Wmissing-braces -Wpointer-arith -Wundef \
        -Wconversion -Wsign-conversion \
        -Wformat-security \
        -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I25167f17f231ed741f19af87ca0aa72991563a0f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2653746
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Richard Zhao
2022-05-04 15:23:31 -07:00
committed by mobile promotions
parent 69ec2dcff7
commit 1ce899ce46
38 changed files with 93 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/common/gsp_scheduler/ipc/gsp_cmd.c
View File

@@ -146,5 +146,6 @@ exit:
u32 nvgpu_gsp_get_last_cmd_id(struct gk20a *g)
{
(void)g;
return GSP_NV_CMDQ_LOG_ID__LAST;
}

3
drivers/gpu/nvgpu/common/gsp_scheduler/ipc/gsp_msg.c
View File

@@ -49,6 +49,7 @@ static int gsp_handle_event(struct nvgpu_gsp_sched *gsp_sched,
break;
}
(void)gsp_sched;
return err;
}
@@ -193,7 +194,7 @@ int nvgpu_gsp_process_message(struct gk20a *g)
nvgpu_info(g, "ctrl_flags = 0x%08x, seq_id = 0x%08x",
msg.hdr.ctrl_flags, msg.hdr.seq_id);
msg.hdr.ctrl_flags &= ~GSP_CMD_FLAGS_MASK;
msg.hdr.ctrl_flags &= (u8)~GSP_CMD_FLAGS_MASK;
if (msg.hdr.ctrl_flags == GSP_CMD_FLAGS_EVENT) {
gsp_handle_event(gsp_sched, &msg);

6
drivers/gpu/nvgpu/common/gsp_scheduler/ipc/gsp_seq.c
View File

@@ -92,7 +92,6 @@ int nvgpu_gsp_seq_acquire(struct gk20a *g,
gsp_callback callback, void *cb_params)
{
struct gsp_sequence *seq;
u16 size_of_seq_tbl = 0;
u32 index = 0;
int err = 0;
@@ -100,10 +99,7 @@ int nvgpu_gsp_seq_acquire(struct gk20a *g,
nvgpu_mutex_acquire(&sequences->gsp_seq_lock);
size_of_seq_tbl = sizeof(sequences->gsp_seq_tbl) *
sizeof(sequences->gsp_seq_tbl[0]);
index = find_first_zero_bit(sequences->gsp_seq_tbl,
index = (u32)find_first_zero_bit(sequences->gsp_seq_tbl,
GSP_MAX_NUM_SEQUENCES);
if (index >= GSP_MAX_NUM_SEQUENCES) {