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gpu: nvgpu: fix compile error of new compile flags

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Preparing to push hvrtos gpu server changes which requires bellow CFLAGS:
        -Werror -Wall -Wextra \
        -Wmissing-braces -Wpointer-arith -Wundef \
        -Wconversion -Wsign-conversion \
        -Wformat-security \
        -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I25167f17f231ed741f19af87ca0aa72991563a0f
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2653746
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Richard Zhao
2022-05-04 15:23:31 -07:00
committed by mobile promotions
parent 69ec2dcff7
commit 1ce899ce46
38 changed files with 93 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/hal/fb/fb_ga10b.c
View File

@@ -390,7 +390,7 @@ int ga10b_fb_set_remote_swizid(struct gk20a *g, bool enable)
while (pbdma_id_mask != 0U) {
u32 fault_id;
u32 pbdma_id = nvgpu_safe_sub_u32(
nvgpu_ffs(pbdma_id_mask), 1UL);
(u32)nvgpu_ffs(pbdma_id_mask), 1UL);
fault_id =
g->ops.pbdma.get_mmu_fault_id(g, pbdma_id);

6
drivers/gpu/nvgpu/hal/fb/vab/vab_ga10b.c
View File

@@ -72,7 +72,7 @@ int ga10b_fb_vab_init(struct gk20a *g)
* Each packet contains 32B access bits and 32B meta data.
* Thus, total entry size is twice of the VAB access bits.
*/
vab_entry_size = nvgpu_safe_mult_u32(vab_size_bytes, 2UL);
vab_entry_size = nvgpu_safe_mult_u32((u32)vab_size_bytes, 2UL);
nvgpu_log(g, gpu_dbg_vab, "vab_entry_size 0x%lx", vab_entry_size);
vab->entry_size = vab_entry_size;
@@ -81,7 +81,7 @@ int ga10b_fb_vab_init(struct gk20a *g)
if (!nvgpu_mem_is_valid(vab_buf)) {
/* Allocate memory for single VAB entry */
err = nvgpu_dma_alloc_map_sys(vm, nvgpu_safe_mult_u32(
vab->entry_size, vab->num_entries), vab_buf);
(u32)vab->entry_size, vab->num_entries), vab_buf);
if (err != 0) {
nvgpu_err(g, "Error in vab buffer alloc in bar2 vm ");
return -ENOMEM;
@@ -220,7 +220,7 @@ static int ga10b_fb_vab_config_address_range(struct gk20a *g,
U32(vab_range_checker[i].start_phys_addr >> 32U));
nvgpu_writel(g, fb_mmu_vidmem_access_bit_start_addr_lo_r(i),
(vab_range_checker[i].start_phys_addr &
((u32)vab_range_checker[i].start_phys_addr &
fb_mmu_vidmem_access_bit_start_addr_lo_val_m()) |
fb_mmu_vidmem_access_bit_start_addr_lo_granularity_f(
granularity_shift_bits));