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gpu: nvgpu: Remove pmgr.h dependency from gk20a.h

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gk20a.h depends on definition of struct pmgr_pmupstate. Change that
to a pointer and use forward declaration, and allocation and
free functions. Also set pointer to NULL when freed.

Fix a few build breaks by adding explicit includes where previously
a header file had gotten included implicitly.

JIRA NVGPU-596

Change-Id: I21ff1ae93ac7b92a71502f97785252c04964e72f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1954003
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-11-09 08:46:44 -08:00
committed by mobile promotions
parent ae6e4d0572
commit 1cf6e4fc5e
11 changed files with 111 additions and 71 deletions
Download Patch File Download Diff File Expand all files Collapse all files

38
drivers/gpu/nvgpu/pstate/pstate.c
View File

@@ -37,6 +37,7 @@ static int pstate_sw_setup(struct gk20a *g);
void gk20a_deinit_pstate_support(struct gk20a *g)
{
pmgr_pmu_free_pmupstate(g);
therm_pmu_free_pmupstate(g);
perf_pmu_free_pmupstate(g);
clk_free_pmupstate(g);
@@ -70,84 +71,89 @@ int gk20a_init_pstate_support(struct gk20a *g)
goto err_perf_pmu_init_pmupstate;
}
err = volt_rail_sw_setup(g);
err = pmgr_pmu_init_pmupstate(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
}
err = volt_rail_sw_setup(g);
if (err != 0) {
goto err_pmgr_pmu_init_pmupstate;
}
err = volt_dev_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = volt_policy_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = clk_vin_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = clk_fll_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = therm_domain_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = vfe_var_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = vfe_equ_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = clk_domain_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = clk_vf_point_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = clk_prog_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
err = pstate_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
if(g->ops.clk.support_pmgr_domain) {
err = pmgr_domain_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
}
if (g->ops.clk.support_clk_freq_controller) {
err = clk_freq_controller_sw_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
}
if(g->ops.clk.support_lpwr_pg) {
err = nvgpu_lpwr_pg_setup(g);
if (err != 0) {
goto err_therm_pmu_init_pmupstate;
goto err_pmgr_pmu_init_pmupstate;
}
}
@@ -160,6 +166,8 @@ int gk20a_init_pstate_support(struct gk20a *g)
return 0;
err_pmgr_pmu_init_pmupstate:
pmgr_pmu_free_pmupstate(g);
err_therm_pmu_init_pmupstate:
therm_pmu_free_pmupstate(g);
err_perf_pmu_init_pmupstate: