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gpu: nvgpu: unit: add MMU faults unit
Add a new unit to cover MMU faults, with a focus on GV11B JIRA NVGPU-907 Change-Id: Ia5f80d5b5614cae24a5dcf2835a8e84edb271ab9 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1978366 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Nicolas Benech
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26
userspace/units/mm/page_table_faults/Makefile
Normal file
26
userspace/units/mm/page_table_faults/Makefile
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@@ -0,0 +1,26 @@
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# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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#
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||||
# Permission is hereby granted, free of charge, to any person obtaining a
|
||||
# copy of this software and associated documentation files (the "Software"),
|
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# to deal in the Software without restriction, including without limitation
|
||||
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
# and/or sell copies of the Software, and to permit persons to whom the
|
||||
# Software is furnished to do so, subject to the following conditions:
|
||||
#
|
||||
# The above copyright notice and this permission notice shall be included in
|
||||
# all copies or substantial portions of the Software.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
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# DEALINGS IN THE SOFTWARE.
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.SUFFIXES:
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OBJS = page_table_faults.o
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MODULE = page_table_faults
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include ../../Makefile.units
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23
userspace/units/mm/page_table_faults/Makefile.interface.tmk
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23
userspace/units/mm/page_table_faults/Makefile.interface.tmk
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################################### tell Emacs this is a -*- makefile-gmake -*-
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#
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# Copyright (c) 2018-2019, NVIDIA CORPORATION. All Rights Reserved.
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#
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# NVIDIA CORPORATION and its licensors retain all intellectual property
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# and proprietary rights in and to this software, related documentation
|
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# and any modifications thereto. Any use, reproduction, disclosure or
|
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# distribution of this software and related documentation without an express
|
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# license agreement from NVIDIA CORPORATION is strictly prohibited.
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#
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# tmake for SW Mobile component makefile
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#
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###############################################################################
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NVGPU_UNIT_NAME=page_table_faults
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include $(NV_COMPONENT_DIR)/../../Makefile.units.common.interface.tmk
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# Local Variables:
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# indent-tabs-mode: t
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# tab-width: 8
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# End:
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# vi: set tabstop=8 noexpandtab:
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23
userspace/units/mm/page_table_faults/Makefile.tmk
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23
userspace/units/mm/page_table_faults/Makefile.tmk
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@@ -0,0 +1,23 @@
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################################### tell Emacs this is a -*- makefile-gmake -*-
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#
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# Copyright (c) 2018-2019 NVIDIA CORPORATION. All Rights Reserved.
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#
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# NVIDIA CORPORATION and its licensors retain all intellectual property
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# and proprietary rights in and to this software, related documentation
|
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# and any modifications thereto. Any use, reproduction, disclosure or
|
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# distribution of this software and related documentation without an express
|
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# license agreement from NVIDIA CORPORATION is strictly prohibited.
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#
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# tmake for SW Mobile component makefile
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#
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###############################################################################
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NVGPU_UNIT_NAME=page_table_faults
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include $(NV_COMPONENT_DIR)/../../Makefile.units.common.tmk
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# Local Variables:
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# indent-tabs-mode: t
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# tab-width: 8
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# End:
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# vi: set tabstop=8 noexpandtab:
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354
userspace/units/mm/page_table_faults/page_table_faults.c
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354
userspace/units/mm/page_table_faults/page_table_faults.c
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@@ -0,0 +1,354 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
|
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* copy of this software and associated documentation files (the "Software"),
|
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* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
|
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* Software is furnished to do so, subject to the following conditions:
|
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*
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* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <nvgpu/io.h>
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#include <nvgpu/posix/io.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/types.h>
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#include <nvgpu/sizes.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/mm.h>
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#include <nvgpu/vm.h>
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#include <nvgpu/nvgpu_sgt.h>
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#include "os/posix/os_posix.h"
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#include "gk20a/mm_gk20a.h"
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#include "gm20b/mm_gm20b.h"
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#include "gp10b/mm_gp10b.h"
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#include "gv11b/mm_gv11b.h"
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#include "gv11b/fifo_gv11b.h"
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#include "common/fb/fb_gp10b.h"
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#include "common/fb/fb_gm20b.h"
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#include "common/fb/fb_gv11b.h"
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#include "nvgpu/hw/gv11b/hw_gmmu_gv11b.h"
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#include "nvgpu/hw/gv11b/hw_fb_gv11b.h"
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#define TEST_PA_ADDRESS 0xEFAD80000000
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#define TEST_COMP_TAG 0xEF
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#define TEST_INVALID_ADDRESS 0xAAC0000000
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/*
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* Write callback (for all nvgpu_writel calls).
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*/
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static void writel_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
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nvgpu_posix_io_record_access(g, access);
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}
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/*
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* Read callback, similar to the write callback above.
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*/
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static void readl_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
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}
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/*
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* Define all the callbacks to be used during the test. Typically all
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* write operations use the same callback, likewise for all read operations.
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*/
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static struct nvgpu_posix_io_callbacks mmu_faults_callbacks = {
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/* Write APIs all can use the same accessor. */
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.writel = writel_access_reg_fn,
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.writel_check = writel_access_reg_fn,
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.bar1_writel = writel_access_reg_fn,
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.usermode_writel = writel_access_reg_fn,
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/* Likewise for the read APIs. */
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.__readl = readl_access_reg_fn,
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.readl = readl_access_reg_fn,
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.bar1_readl = readl_access_reg_fn,
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};
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static void init_platform(struct unit_module *m, struct gk20a *g, bool is_iGPU)
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{
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if (is_iGPU) {
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nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);
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} else {
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nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, false);
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}
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}
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/*
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* Init the minimum set of HALs to use GMMU features, then call the init_mm
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* base function.
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*/
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static int init_mm(struct unit_module *m, struct gk20a *g)
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{
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u64 low_hole, aperture_size;
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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struct mm_gk20a *mm = &g->mm;
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int err;
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p->mm_is_iommuable = true;
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/* Minimum HALs for page_table */
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g->ops.mm.get_default_big_page_size =
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gp10b_mm_get_default_big_page_size;
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g->ops.mm.get_mmu_levels = gp10b_mm_get_mmu_levels;
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g->ops.mm.alloc_inst_block = gk20a_alloc_inst_block;
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g->ops.mm.init_inst_block = gv11b_init_inst_block;
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g->ops.mm.init_pdb = gp10b_mm_init_pdb;
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g->ops.mm.gmmu_map = gk20a_locked_gmmu_map;
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g->ops.mm.gmmu_unmap = gk20a_locked_gmmu_unmap;
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g->ops.mm.gpu_phys_addr = gv11b_gpu_phys_addr;
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g->ops.fb.compression_page_size = gp10b_fb_compression_page_size;
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g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate;
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/* New HALs for fault testing */
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g->ops.mm.mmu_fault_pending = gv11b_mm_mmu_fault_pending;
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g->ops.mm.fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy;
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g->ops.mm.mmu_fault_disable_hw = gv11b_mm_mmu_fault_disable_hw;
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g->ops.mm.init_mm_setup_hw = gv11b_init_mm_setup_hw;
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g->ops.mm.set_big_page_size = gm20b_mm_set_big_page_size;
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g->ops.mm.l2_flush = gv11b_mm_l2_flush;
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g->ops.fb.init_hw = gv11b_fb_init_hw;
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g->ops.fb.enable_hub_intr = gv11b_fb_enable_hub_intr;
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g->ops.fb.fault_buf_configure_hw = gv11b_fb_fault_buf_configure_hw;
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g->ops.fb.read_mmu_fault_buffer_size =
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fb_gv11b_read_mmu_fault_buffer_size;
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g->ops.fb.write_mmu_fault_buffer_size =
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fb_gv11b_write_mmu_fault_buffer_size;
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g->ops.fb.read_mmu_fault_status = fb_gv11b_read_mmu_fault_status;
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g->ops.fb.write_mmu_fault_buffer_lo_hi =
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fb_gv11b_write_mmu_fault_buffer_lo_hi;
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g->ops.fb.mmu_fault_pending = gv11b_fb_mmu_fault_pending;
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g->ops.fb.is_fault_buf_enabled = gv11b_fb_is_fault_buf_enabled;
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g->ops.fb.fault_buf_set_state_hw = gv11b_fb_fault_buf_set_state_hw;
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g->ops.fifo.get_num_fifos = gv11b_fifo_get_num_fifos;
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/*
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* Define some arbitrary addresses for test purposes.
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* Note: no need to malloc any memory as this unit only needs to trigger
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* MMU faults via register mocking. No other memory accesses are done.
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*/
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g->mm.sysmem_flush.cpu_va = (void *) 0x10000000;
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g->mm.mmu_wr_mem.cpu_va = (void *) 0x20000000;
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g->mm.mmu_rd_mem.cpu_va = (void *) 0x30000000;
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nvgpu_posix_register_io(g, &mmu_faults_callbacks);
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nvgpu_posix_io_init_reg_space(g);
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/* Register space: FB_MMU */
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if (nvgpu_posix_io_add_reg_space(g, fb_niso_intr_r(), 0x800) != 0) {
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unit_return_fail(m, "nvgpu_posix_io_add_reg_space failed\n");
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}
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/*
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* Initialize VM space for system memory to be used throughout this
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* unit module.
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* Values below are similar to those used in nvgpu_init_system_vm()
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*/
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low_hole = SZ_4K * 16UL;
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aperture_size = GK20A_PMU_VA_SIZE;
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mm->pmu.aperture_size = GK20A_PMU_VA_SIZE;
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mm->pmu.vm = nvgpu_vm_init(g, g->ops.mm.get_default_big_page_size(),
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low_hole,
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aperture_size - low_hole,
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aperture_size,
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true,
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false,
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false,
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"system");
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if (mm->pmu.vm == NULL) {
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unit_return_fail(m, "'system' nvgpu_vm_init failed\n");
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}
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/* BAR2 memory space */
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mm->bar2.aperture_size = U32(32) << 20U;
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mm->bar2.vm = nvgpu_vm_init(g, g->ops.mm.get_default_big_page_size(),
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SZ_4K, mm->bar2.aperture_size - SZ_4K,
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mm->bar2.aperture_size, false, false, false, "bar2");
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if (mm->bar2.vm == NULL) {
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unit_return_fail(m, "'bar2' nvgpu_vm_init failed\n");
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}
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/* Init MM H/W */
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err = g->ops.mm.init_mm_setup_hw(g);
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if (err != 0) {
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unit_return_fail(m, "init_mm_setup_hw failed code=%d\n", err);
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}
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/*
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* Call the init function again to cover branches checking for already
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* initialized structures
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*/
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err = g->ops.mm.init_mm_setup_hw(g);
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if (err != 0) {
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unit_return_fail(m, "init_mm_setup_hw/2 failed code=%d\n", err);
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}
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return UNIT_SUCCESS;
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}
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/*
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* Test: test_page_faults_init
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* This test must be run once and be the first one as it initializes the MM
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* subsystem.
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*/
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static int test_page_faults_init(struct unit_module *m,
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struct gk20a *g, void *args)
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{
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u64 debug_level = (u64)args;
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g->log_mask = 0;
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if (debug_level >= 1) {
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g->log_mask = gpu_dbg_map;
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}
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if (debug_level >= 2) {
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g->log_mask |= gpu_dbg_map_v;
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}
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if (debug_level >= 3) {
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g->log_mask |= gpu_dbg_pte;
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}
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init_platform(m, g, true);
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if (init_mm(m, g) != 0) {
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unit_return_fail(m, "nvgpu_init_mm_support failed\n");
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}
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return UNIT_SUCCESS;
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}
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/* Helper function to write an error in the status register */
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static void write_error(struct unit_module *m, struct gk20a *g, u32 error)
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{
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nvgpu_posix_io_writel_reg_space(g, fb_niso_intr_r(), error);
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}
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/*
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* Test: test_page_faults_pending
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* Check that no faults are already pending, then add one and check that it is
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* pending.
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*/
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static int test_page_faults_pending(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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if (g->ops.mm.mmu_fault_pending(g)) {
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unit_return_fail(m, "MMU fault already pending at init.\n");
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}
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/* Write a fault in the pending register */
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write_error(m, g, fb_niso_intr_mmu_other_fault_notify_m());
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if (!g->ops.mm.mmu_fault_pending(g)) {
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unit_return_fail(m, "MMU fault not pending as expected.\n");
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}
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return UNIT_SUCCESS;
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}
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/*
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* Test: test_page_faults_disable_hw
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* Test the fault_disable_hw mechanism.
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*/
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static int test_page_faults_disable_hw(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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g->ops.mm.mmu_fault_disable_hw(g);
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if (g->ops.fb.is_fault_buf_enabled(g,
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NVGPU_FB_MMU_FAULT_NONREPLAY_REG_INDEX)) {
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unit_return_fail(m, "Non-replay buf still enabled\n");
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}
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if (g->ops.fb.is_fault_buf_enabled(g,
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NVGPU_FB_MMU_FAULT_REPLAY_REG_INDEX)) {
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unit_return_fail(m, "Non-replay buf still enabled\n");
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}
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/* Call disable again to test some branches */
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g->ops.mm.mmu_fault_disable_hw(g);
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return UNIT_SUCCESS;
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}
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/*
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* Test: test_page_faults_inst_block.
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* This test supports 3 types of scenario to cover corner cases:
|
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* 0 (default): regular alloc_inst_block with default values
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* 1: alloc_inst_block with large page size
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* 2: alloc_inst_block with large page size and set_big_page_size set to NULL to
|
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* test a corner case in gv11b_init_inst_block (branch coverage)
|
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*/
|
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static int test_page_faults_inst_block(struct unit_module *m, struct gk20a *g,
|
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void *args)
|
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{
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struct nvgpu_mem inst_blk_desc;
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u64 scenario = (u64)args;
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u32 big_page_size = 0;
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/* Handle some corner cases */
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if (scenario == 1) {
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/* Init inst_block with large page size */
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big_page_size = g->ops.mm.get_default_big_page_size();
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} else if (scenario == 2) {
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/* Handle branch case in gv11b_init_inst_block() */
|
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big_page_size = g->ops.mm.get_default_big_page_size();
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g->ops.mm.set_big_page_size = NULL;
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}
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if (g->ops.mm.alloc_inst_block(g, &inst_blk_desc) != 0) {
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unit_return_fail(m, "alloc_inst_block failed\n");
|
||||
}
|
||||
|
||||
g->ops.mm.init_inst_block(&inst_blk_desc, g->mm.bar2.vm, big_page_size);
|
||||
|
||||
return UNIT_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
* Test: test_page_faults_clean
|
||||
* This test should be the last one to run as it de-initializes components.
|
||||
*/
|
||||
static int test_page_faults_clean(struct unit_module *m, struct gk20a *g,
|
||||
void *args)
|
||||
{
|
||||
g->log_mask = 0;
|
||||
g->ops.mm.fault_info_mem_destroy(g);
|
||||
nvgpu_vm_put(g->mm.pmu.vm);
|
||||
nvgpu_vm_put(g->mm.bar2.vm);
|
||||
|
||||
/* Call again to test some branches */
|
||||
g->ops.mm.fault_info_mem_destroy(g);
|
||||
|
||||
return UNIT_SUCCESS;
|
||||
}
|
||||
|
||||
struct unit_module_test nvgpu_gmmu_faults_tests[] = {
|
||||
UNIT_TEST(init, test_page_faults_init, (void *)0),
|
||||
UNIT_TEST(pending, test_page_faults_pending, NULL),
|
||||
UNIT_TEST(disable_hw, test_page_faults_disable_hw, NULL),
|
||||
UNIT_TEST(inst_block_s0, test_page_faults_inst_block, (void *)0),
|
||||
UNIT_TEST(inst_block_s1, test_page_faults_inst_block, (void *)1),
|
||||
UNIT_TEST(inst_block_s2, test_page_faults_inst_block, (void *)2),
|
||||
UNIT_TEST(clean, test_page_faults_clean, NULL),
|
||||
};
|
||||
|
||||
UNIT_MODULE(page_table_faults, nvgpu_gmmu_faults_tests, UNIT_PRIO_NVGPU_TEST);
|
||||
Reference in New Issue
Block a user