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gpu: nvgpu: Remove mm.get_iova_addr
Remove the mm.get_iova_addr() HAL and replace it with a new HAL called mm.gpu_phys_addr(). This new HAL provides the real phys address that should be passed to the GPU from a physical address obtained from a scatter list. It also provides a mechanism by which the HAL code can add extra bits to a GPU physical address based on the attributes passed in. This is necessary during GMMU page table programming. Also remove the flags argument from the various address functions. This flag was used for adding an IO coherence bit to the GPU physical address which is not supported. JIRA NVGPU-30 Change-Id: I69af5b1c6bd905c4077c26c098fac101c6b41a33 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530864 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -15,6 +15,7 @@
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*/
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#include <nvgpu/dma.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/page_allocator.h>
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#include <nvgpu/log.h>
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@@ -23,6 +24,8 @@
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#include <nvgpu/linux/dma.h>
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#include "os_linux.h"
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#include "gk20a/gk20a.h"
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#include "gk20a/mm_gk20a.h"
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@@ -246,6 +249,61 @@ void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
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}
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}
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/*
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* Obtain a SYSMEM address from a Linux SGL. This should eventually go away
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* and/or become private to this file once all bad usages of Linux SGLs are
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* cleaned up in the driver.
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*/
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u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl)
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{
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struct nvgpu_os_linux *l = container_of(g, struct nvgpu_os_linux, g);
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if (!device_is_iommuable(l->dev))
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return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl));
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if (sg_dma_address(sgl) == 0)
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return g->ops.mm.gpu_phys_addr(g, NULL, sg_phys(sgl));
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if (sg_dma_address(sgl) == DMA_ERROR_CODE)
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return 0;
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return gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(sgl));
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}
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/*
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* Obtain the address the GPU should use from the %mem assuming this is a SYSMEM
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* allocation.
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*/
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static u64 nvgpu_mem_get_addr_sysmem(struct gk20a *g, struct nvgpu_mem *mem)
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{
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return nvgpu_mem_get_addr_sgl(g, mem->priv.sgt->sgl);
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}
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/*
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* Return the base address of %mem. Handles whether this is a VIDMEM or SYSMEM
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* allocation.
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*
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* %attrs can be NULL. If it is not NULL then it may be inspected to determine
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* if the address needs to be modified before writing into a PTE.
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*/
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u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem)
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{
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struct nvgpu_page_alloc *alloc;
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if (mem->aperture == APERTURE_SYSMEM)
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return nvgpu_mem_get_addr_sysmem(g, mem);
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/*
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* Otherwise get the vidmem address.
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*/
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alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl);
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/* This API should not be used with > 1 chunks */
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WARN_ON(alloc->nr_chunks != 1);
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return alloc->base;
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}
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/*
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* Be careful how you use this! You are responsible for correctly freeing this
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* memory.
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