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gpu: nvgpu: fix MISRA 17.7 violations in ACR
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fixes for all 17.7 violations in common/acr code. JIRA NVGPU-3032 Change-Id: I79dbbcca72f50d5c0b0614d6c4e573c5f856ceb4 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2090043 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -370,7 +370,11 @@ int nvgpu_acr_self_hs_load_bootstrap(struct gk20a *g, struct nvgpu_falcon *flcn,
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int err = 0;
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/* falcon reset */
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nvgpu_falcon_reset(flcn);
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err = nvgpu_falcon_reset(flcn);
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if (err != 0) {
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nvgpu_err(g, "nvgpu_falcon_reset() failed err=%d", err);
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return err;
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}
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bin_hdr = (struct bin_hdr *)hs_fw->data;
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fw_hdr = (struct acr_fw_header *)(hs_fw->data + bin_hdr->header_offset);
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