gpu: nvgpu: Fix MISRA 21.2 violations in log.h

MISRA 21.2 prohibits naming functions with double underscore. So, rename
__nvgpu_log_dbg() and __nvgpu_log_msg() to nvgpu_log_dbg_impl() and
nvgpu_log_msg_impl(), respectively.

JIRA NVGPU-3368

Change-Id: I4548820f6772875088d095539b6da92051e08653
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2118043
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-05-13 16:35:35 -04:00
committed by mobile promotions
parent 050e4f0f5b
commit 1e95144194
7 changed files with 29 additions and 27 deletions

View File

@@ -40,13 +40,13 @@ enum nvgpu_log_type {
* of printing data to a UART, log, whatever. * of printing data to a UART, log, whatever.
*/ */
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line, void nvgpu_log_msg_impl(struct gk20a *g, const char *func_name, int line,
enum nvgpu_log_type type, const char *fmt, ...); enum nvgpu_log_type type, const char *fmt, ...);
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_dbg(struct gk20a *g, u64 log_mask, void nvgpu_log_dbg_impl(struct gk20a *g, u64 log_mask,
const char *func_name, int line, const char *func_name, int line,
const char *fmt, ...); const char *fmt, ...);
/* /*
* Use this define to set a default mask. * Use this define to set a default mask.
@@ -109,7 +109,7 @@ bool nvgpu_log_mask_enabled(struct gk20a *g, u64 log_mask);
* Print a message if the log_mask matches the enabled debugging. * Print a message if the log_mask matches the enabled debugging.
*/ */
#define nvgpu_log(g, log_mask, fmt, arg...) \ #define nvgpu_log(g, log_mask, fmt, arg...) \
__nvgpu_log_dbg(g, log_mask, __func__, __LINE__, fmt, ##arg) nvgpu_log_dbg_impl(g, log_mask, __func__, __LINE__, fmt, ##arg)
/** /**
* nvgpu_err - Print an error * nvgpu_err - Print an error
@@ -121,7 +121,7 @@ bool nvgpu_log_mask_enabled(struct gk20a *g, u64 log_mask);
* Uncondtionally print an error message. * Uncondtionally print an error message.
*/ */
#define nvgpu_err(g, fmt, arg...) \ #define nvgpu_err(g, fmt, arg...) \
__nvgpu_log_msg(g, __func__, __LINE__, NVGPU_ERROR, fmt, ##arg) nvgpu_log_msg_impl(g, __func__, __LINE__, NVGPU_ERROR, fmt, ##arg)
/** /**
* nvgpu_err - Print a warning * nvgpu_err - Print a warning
@@ -133,7 +133,7 @@ bool nvgpu_log_mask_enabled(struct gk20a *g, u64 log_mask);
* Uncondtionally print a warming message. * Uncondtionally print a warming message.
*/ */
#define nvgpu_warn(g, fmt, arg...) \ #define nvgpu_warn(g, fmt, arg...) \
__nvgpu_log_msg(g, __func__, __LINE__, NVGPU_WARNING, fmt, ##arg) nvgpu_log_msg_impl(g, __func__, __LINE__, NVGPU_WARNING, fmt, ##arg)
/** /**
* nvgpu_info - Print an info message * nvgpu_info - Print an info message
@@ -145,7 +145,7 @@ bool nvgpu_log_mask_enabled(struct gk20a *g, u64 log_mask);
* Unconditionally print an information message. * Unconditionally print an information message.
*/ */
#define nvgpu_info(g, fmt, arg...) \ #define nvgpu_info(g, fmt, arg...) \
__nvgpu_log_msg(g, __func__, __LINE__, NVGPU_INFO, fmt, ##arg) nvgpu_log_msg_impl(g, __func__, __LINE__, NVGPU_INFO, fmt, ##arg)
/* /*
* Some convenience macros. * Some convenience macros.
@@ -172,7 +172,7 @@ extern u64 nvgpu_dbg_mask;
#define gk20a_dbg(log_mask, fmt, arg...) \ #define gk20a_dbg(log_mask, fmt, arg...) \
do { \ do { \
if (((log_mask) & nvgpu_dbg_mask) != 0) { \ if (((log_mask) & nvgpu_dbg_mask) != 0) { \
__nvgpu_log_msg(NULL, __func__, __LINE__, \ nvgpu_log_msg_impl(NULL, __func__, __LINE__, \
NVGPU_DEBUG, fmt "\n", ##arg); \ NVGPU_DEBUG, fmt "\n", ##arg); \
} \ } \
} while (false) } while (false)

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@@ -1,7 +1,5 @@
# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. # Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
__nvgpu_log_dbg
__nvgpu_log_msg
bitmap_clear bitmap_clear
bitmap_find_next_zero_area_off bitmap_find_next_zero_area_off
bitmap_set bitmap_set
@@ -88,6 +86,8 @@ nvgpu_kmem_cache_destroy
nvgpu_kmem_cache_free nvgpu_kmem_cache_free
nvgpu_kmem_get_fault_injection nvgpu_kmem_get_fault_injection
nvgpu_kzalloc_impl nvgpu_kzalloc_impl
nvgpu_log_dbg_impl
nvgpu_log_msg_impl
nvgpu_memset nvgpu_memset
nvgpu_mem_create_from_phys nvgpu_mem_create_from_phys
nvgpu_mem_iommu_translate nvgpu_mem_iommu_translate

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@@ -93,7 +93,7 @@ static void __dma_dbg(struct gk20a *g, size_t size, unsigned long flags,
nvgpu_dma_flags_to_str(g, flags, flags_str); nvgpu_dma_flags_to_str(g, flags, flags_str);
__nvgpu_log_dbg(g, gpu_dbg_dma, nvgpu_log_dbg_impl(g, gpu_dbg_dma,
func, line, func, line,
"DMA %s: [%s] size=%-7zu " "DMA %s: [%s] size=%-7zu "
"aligned=%-7zu total=%-10llukB %s", "aligned=%-7zu total=%-10llukB %s",

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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
@@ -98,8 +98,8 @@ static void __nvgpu_really_print_log(u32 trace, const char *gpu_name,
} }
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line, void nvgpu_log_msg_impl(struct gk20a *g, const char *func_name, int line,
enum nvgpu_log_type type, const char *fmt, ...) enum nvgpu_log_type type, const char *fmt, ...)
{ {
char log[LOG_BUFFER_LENGTH]; char log[LOG_BUFFER_LENGTH];
va_list args; va_list args;
@@ -113,9 +113,9 @@ void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line,
} }
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_dbg(struct gk20a *g, u64 log_mask, void nvgpu_log_dbg_impl(struct gk20a *g, u64 log_mask,
const char *func_name, int line, const char *func_name, int line,
const char *fmt, ...) const char *fmt, ...)
{ {
char log[LOG_BUFFER_LENGTH]; char log[LOG_BUFFER_LENGTH];
va_list args; va_list args;

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@@ -28,5 +28,5 @@ int nvgpu_current_pid(struct gk20a *g)
void nvgpu_print_current_impl(struct gk20a *g, const char *func_name, int line, void nvgpu_print_current_impl(struct gk20a *g, const char *func_name, int line,
void *ctx, enum nvgpu_log_type type) void *ctx, enum nvgpu_log_type type)
{ {
__nvgpu_log_msg(g, func_name, line, type, current->comm); nvgpu_log_msg_impl(g, func_name, line, type, current->comm);
} }

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@@ -66,8 +66,8 @@ static void __nvgpu_really_print_log(const char *gpu_name,
} }
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line, void nvgpu_log_msg_impl(struct gk20a *g, const char *func_name, int line,
enum nvgpu_log_type type, const char *fmt, ...) enum nvgpu_log_type type, const char *fmt, ...)
{ {
char log[LOG_BUFFER_LENGTH]; char log[LOG_BUFFER_LENGTH];
va_list args; va_list args;
@@ -81,9 +81,9 @@ void __nvgpu_log_msg(struct gk20a *g, const char *func_name, int line,
} }
__attribute__((format (printf, 5, 6))) __attribute__((format (printf, 5, 6)))
void __nvgpu_log_dbg(struct gk20a *g, u64 log_mask, void nvgpu_log_dbg_impl(struct gk20a *g, u64 log_mask,
const char *func_name, int line, const char *func_name, int line,
const char *fmt, ...) const char *fmt, ...)
{ {
char log[LOG_BUFFER_LENGTH]; char log[LOG_BUFFER_LENGTH];
va_list args; va_list args;

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@@ -52,8 +52,10 @@ void nvgpu_print_current_impl(struct gk20a *g, const char *func_name, int line,
/* pthread_getname_np() will return null terminated string on success */ /* pthread_getname_np() will return null terminated string on success */
if (pthread_getname_np(0, current_tname, CURRENT_NAME_LEN) == 0) { if (pthread_getname_np(0, current_tname, CURRENT_NAME_LEN) == 0) {
__nvgpu_log_msg(g, func_name, line, type, "%s", current_tname); nvgpu_log_msg_impl(g, func_name, line, type, "%s",
current_tname);
} else { } else {
__nvgpu_log_msg(g, func_name, line, type, "(unknown process)"); nvgpu_log_msg_impl(g, func_name, line, type,
"(unknown process)");
} }
} }