gpu: nvgpu: add nvgpu_hvrtos build

- nvgpu_hvrtos disabled bellow configs:
  - CONFIG_NVGPU_IVM_BUILD
  - CONFIG_NVGPU_TRACE
  - CONFIG_NVGPU_SYSFS
  - CONFIG_NVGPU_DGPU
  - CONFIG_NVGPU_IGPU_VIRT
  - CONFIG_NVGPU_NVLINK
  - CONFIG_NVGPU_CLK_ARB
  - CONFIG_NVGPU_MIG
- nvgpu_hvrtos re-uses posix bitmap.c
- add nvgpu_hvrtos specific headers
- add static check of vgpu ivc frame
- fix build errors caused by new CFLAGS

Jira GVSCI-9976

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I5f65fda9444d0cbfe6008ac4ab8262b44d1a4f56
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2653745
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Austin Tajiri <atajiri@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/gpu/nvgpu/Makefile.shared.configs

@@ -61,8 +61,10 @@ ifeq ($(CONFIG_NVGPU_DGPU),1)
 NVGPU_COMMON_CFLAGS		+= -DCONFIG_PCI_MSI
 endif
 
+ifndef NVGPU_HVRTOS
 CONFIG_NVGPU_IVM_BUILD               := 1
 NVGPU_COMMON_CFLAGS                  += -DCONFIG_NVGPU_IVM_BUILD
+endif
 
 CONFIG_NVGPU_LOGGING                 := 1
 NVGPU_COMMON_CFLAGS                  += -DCONFIG_NVGPU_LOGGING
@@ -161,8 +163,10 @@ NVGPU_COMMON_CFLAGS		+= -DCONFIG_NVGPU_TEGRA_FUSE
 #
 ifneq ($(profile),safety_release)
 
+ifndef NVGPU_HVRTOS
 CONFIG_NVGPU_TRACE              := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_TRACE
+endif
 
 CONFIG_NVGPU_FALCON_DEBUG       := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_FALCON_DEBUG
@@ -182,8 +186,10 @@ endif
 #
 ifneq ($(profile),safety_debug)
 
+ifneq ($(NVGPU_HVRTOS),1)
 CONFIG_NVGPU_SYSFS              := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_SYSFS
+endif
 
 # ACR feature to enable old tegra ACR profile support
 CONFIG_NVGPU_ACR_LEGACY         := 1
@@ -214,17 +220,21 @@ CONFIG_NVGPU_FECS_TRACE         := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_FECS_TRACE
 
 ifneq ($(CONFIG_NVGPU_DGPU),1)
+ifneq ($(NVGPU_HVRTOS),1)
 CONFIG_NVGPU_IGPU_VIRT          := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_IGPU_VIRT
 endif
+endif
 
 # Enable the usage of 3LSS error injection features.
 CONFIG_NVGPU_USE_3LSS_ERR_INJECTION := 1
 NVGPU_COMMON_CFLAGS                 += -DCONFIG_NVGPU_USE_3LSS_ERR_INJECTION
 
+ifneq ($(NVGPU_HVRTOS),1)
 # Enable nvlink support for normal build.
 CONFIG_NVGPU_NVLINK             := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_NVLINK
+endif
 
 # Enable static_powergate support for normal build.
 CONFIG_NVGPU_STATIC_POWERGATE      := 1
@@ -234,9 +244,11 @@ NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_STATIC_POWERGATE
 CONFIG_MSSNVLINK0_RST_CONTROL   := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_MSSNVLINK0_RST_CONTROL
 
+ifneq ($(NVGPU_HVRTOS),1)
 # Enable dgpu support for normal build.
 CONFIG_NVGPU_DGPU               := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_DGPU
+endif
 
 CONFIG_NVGPU_VPR                := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_VPR
@@ -267,8 +279,10 @@ NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_HAL_NON_FUSA
 CONFIG_NVGPU_NON_FUSA           := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_NON_FUSA
 
+ifneq ($(NVGPU_HVRTOS),1)
 CONFIG_NVGPU_CLK_ARB            := 1
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_CLK_ARB
+endif
 
 NVGPU_COMMON_CFLAGS             += -DCONFIG_NVGPU_FALCON_NON_FUSA
 
@@ -325,9 +339,11 @@ NVGPU_COMMON_CFLAGS             += -DCONFIG_TEGRA_GR_VIRTUALIZATION_SERVER
 CONFIG_NVGPU_SM_DIVERSITY            := 1
 NVGPU_COMMON_CFLAGS                  += -DCONFIG_NVGPU_SM_DIVERSITY
 
+ifndef NVGPU_HVRTOS
 # Enable Multi Instance GPU support for normal build
 CONFIG_NVGPU_MIG                     := 1
 NVGPU_COMMON_CFLAGS                  += -DCONFIG_NVGPU_MIG
+endif
 
 # Enable gsp scheduler for normal build
 CONFIG_NVGPU_GSP_SCHEDULER	:= 1

drivers/gpu/nvgpu/Makefile.sources

@@ -74,6 +74,7 @@ srcs += os/posix/posix-vidmem.c
 endif
 endif
 
+ifndef NVGPU_HVRTOS
 # POSIX sources shared between the POSIX and QNX builds.
 srcs += os/posix/bug.c \
 	os/posix/rwsem.c \
@@ -83,10 +84,12 @@ srcs += os/posix/bug.c \
 	os/posix/lock.c \
 	os/posix/thread.c \
 	os/posix/os_sched.c \
-	os/posix/bitmap.c \
 	os/posix/kmem.c \
 	os/posix/file_ops.c \
 	os/posix/queue.c
+endif
+
+srcs += os/posix/bitmap.c
 
 ifeq ($(NV_BUILD_CONFIGURATION_IS_SAFETY),0)
 srcs += os/posix/bsearch.c

drivers/gpu/nvgpu/common/gsp_scheduler/gsp_runlist.c

@@ -107,8 +107,8 @@ static int gsp_send_cmd_and_wait_for_ack(struct gk20a *g,
 
 	tmp_size = GSP_CMD_HDR_SIZE + size;
 	nvgpu_assert(tmp_size <= U64(U8_MAX));
-	cmd->hdr.size = tmp_size;
-	cmd->hdr.unit_id = unit_id;
+	cmd->hdr.size = (u8)tmp_size;
+	cmd->hdr.unit_id = (u8)unit_id;
 
 	err = nvgpu_gsp_cmd_post(g, cmd, GSP_NV_CMDQ_LOG_ID,
 			gsp_handle_cmd_ack, &command_ack, U32_MAX);
@@ -156,6 +156,8 @@ static void gsp_get_device_info(struct gk20a *g, u8 device_id,
 	dev_info->rl_engine_id = device->rleng_id;
 	dev_info->dev_pri_base = device->pri_base;
 	dev_info->runlist_pri_base = device->rl_pri_base;
+
+	(void)g;
 }
 
 static int gsp_sched_send_devices_info(struct gk20a *g,

drivers/gpu/nvgpu/common/pmu/pg/pg_sw_ga10b.c

@@ -376,6 +376,8 @@ static void ga10b_pg_loading_rpc_handler(struct gk20a *g, struct nvgpu_pmu *pmu,
 			"unsupported PG_LOADING rpc function : 0x%x", rpc->function);
 		break;
 	}
+
+	(void)rpc_payload;
 }
 
 static int ga10b_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
@@ -552,6 +554,7 @@ static int ga10b_pmu_pg_aelpg_disable(struct gk20a *g, u8 ctrl_id)
 
 	PMU_RPC_EXECUTE_CPB(status, pmu, PG, AP_CTRL_DISABLE, &rpc, 0);
 
+	(void)ctrl_id;
 	return status;
 }
 
@@ -568,6 +571,7 @@ static int ga10b_pmu_pg_aelpg_enable(struct gk20a *g, u8 ctrl_id)
 
 	PMU_RPC_EXECUTE_CPB(status, pmu, PG, AP_CTRL_ENABLE, &rpc, 0);
 
+	(void)ctrl_id;
 	return status;
 }
 

drivers/gpu/nvgpu/common/pmu/pg/pg_sw_gm20b.c

@@ -397,6 +397,7 @@ int gm20b_pmu_pg_aelpg_enable(struct gk20a *g, u8 ctrl_id)
 	ap_cmd.enable_ctrl.ctrl_id = PMU_AP_CTRL_ID_GRAPHICS;
 	status = nvgpu_pmu_ap_send_command(g, &ap_cmd, false);
 
+	(void)ctrl_id;
 	return status;
 }
 
@@ -410,6 +411,7 @@ int gm20b_pmu_pg_aelpg_disable(struct gk20a *g, u8 ctrl_id)
 	ap_cmd.enable_ctrl.ctrl_id = PMU_AP_CTRL_ID_GRAPHICS;
 	status = nvgpu_pmu_ap_send_command(g, &ap_cmd, false);
 
+	(void)ctrl_id;
 	return status;
 }
 

drivers/gpu/nvgpu/common/pmu/pg/pmu_aelpg.c

@@ -55,7 +55,7 @@ int nvgpu_aelpg_init_and_enable(struct gk20a *g, u32 ctrl_id)
 		nvgpu_err(g, "PG AELPG init and Enable function not assigned");
 		return -EINVAL;
 	}
-	status = g->pmu->pg->aelpg_init_and_enable(g, ctrl_id);
+	status = g->pmu->pg->aelpg_init_and_enable(g, (u8)ctrl_id);
 
 	if (status != 0) {
 		nvgpu_err(g, "aelpg_init_and_enable FAILED err=%d",
@@ -75,7 +75,7 @@ int nvgpu_aelpg_enable(struct gk20a *g, u32 ctrl_id)
 		nvgpu_err(g, "AELPG Enable function not assigned");
 		return -EINVAL;
 	}
-	status = g->pmu->pg->aelpg_enable(g, ctrl_id);
+	status = g->pmu->pg->aelpg_enable(g, (u8)ctrl_id);
 
 	if (status != 0) {
 		nvgpu_err(g, "aelpg_enable FAILED err=%d",
@@ -95,7 +95,7 @@ int nvgpu_aelpg_disable(struct gk20a *g, u32 ctrl_id)
 		nvgpu_err(g, "AELPG Disable function not assigned");
 		return -EINVAL;
 	}
-	status = g->pmu->pg->aelpg_disable(g, ctrl_id);
+	status = g->pmu->pg->aelpg_disable(g, (u8)ctrl_id);
 
 	if (status != 0) {
 		nvgpu_err(g, "aelpg_disable FAILED err=%d",

drivers/gpu/nvgpu/hal/ltc/ltc_gm20b_dbg.c

@@ -49,6 +49,7 @@ bool gm20b_ltc_pri_is_ltc_addr(struct gk20a *g, u32 addr)
 
 bool gm20b_ltc_is_pltcg_ltcs_addr(struct gk20a *g, u32 addr)
 {
+	(void)g;
 	return ((addr >= ltc_pltcg_ltcs_base_v()) && (addr < ltc_pltcg_extent_v()));
 }
 

drivers/gpu/nvgpu/include/nvgpu/barrier.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -32,6 +32,8 @@
 #include <nvgpu/linux/barrier.h>
 #elif defined(__NVGPU_POSIX__)
 #include <nvgpu/posix/barrier.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/barrier.h>
 #else
 #include <nvgpu_rmos/include/barrier.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/bug.h

@@ -24,6 +24,8 @@
 
 #ifdef __KERNEL__
 #include <linux/bug.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/bug.h>
 #else
 #include <nvgpu/posix/bug.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/cond.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
 
 #ifdef __KERNEL__
 #include <nvgpu/linux/cond.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/cond.h>
 #else
 #include <nvgpu/posix/cond.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/ecc.h

@@ -101,7 +101,6 @@ struct nvgpu_ecc_stat {
 	struct nvgpu_list_node node;
 };
 
-#ifdef CONFIG_NVGPU_SYSFS
 /**
  * @brief	Helper function to get struct nvgpu_ecc_stat from list node.
  *
@@ -117,7 +116,6 @@ static inline struct nvgpu_ecc_stat *nvgpu_ecc_stat_from_node(
 			(uintptr_t)node - offsetof(struct nvgpu_ecc_stat, node)
 		);
 }
-#endif
 
 /**
  * The structure contains the error statistics assocaited with constituent

drivers/gpu/nvgpu/include/nvgpu/lock.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
 
 #ifdef __KERNEL__
 #include <nvgpu/linux/lock.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/lock.h>
 #else
 #include <nvgpu/posix/lock.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/log.h

@@ -27,6 +27,8 @@
 #include <nvgpu/linux/log.h>
 #elif defined(__NVGPU_POSIX__)
 #include <nvgpu/posix/log.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/log.h>
 #else
 #include <nvgpu_rmos/include/log.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h

@@ -32,6 +32,8 @@
 #include <nvgpu/linux/nvgpu_mem.h>
 #elif defined(__NVGPU_POSIX__)
 #include <nvgpu/posix/nvgpu_mem.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/nvgpu_mem.h>
 #else
 #include <nvgpu_rmos/include/nvgpu_mem.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/periodic_timer.h

@@ -25,6 +25,8 @@
 
 #ifdef __KERNEL__
 #include <nvgpu/linux/periodic_timer.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/periodic_timer.h>
 #else
 #include <nvgpu/posix/periodic_timer.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/posix/utils.h

@@ -424,6 +424,7 @@
  */
 #define MHZ_TO_HZ_ULL(a) ((u64)(a) * MHZ)
 
+#ifndef NVGPU_HVRTOS
 /**
  * @brief Endian conversion.
  *
@@ -443,6 +444,7 @@ static inline u32 be32_to_cpu(u32 x)
 	 */
 	return ntohl(x);
 }
+#endif
 
 /*
  * Hamming weights.

drivers/gpu/nvgpu/include/nvgpu/rwsem.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,6 +24,8 @@
 
 #ifdef __KERNEL__
 #include <nvgpu/linux/rwsem.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/rwsem.h>
 #else
 #include <nvgpu/posix/rwsem.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/sim.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -56,8 +56,8 @@ struct sim_nvgpu {
 #ifdef __KERNEL__
 #include "linux/sim.h"
 #include "linux/sim_pci.h"
-#elif defined(__NVGPU_POSIX__)
-/* Nothing for POSIX-nvgpu. */
+#elif defined(__NVGPU_POSIX__) || defined(NVGPU_HVRTOS)
+/* Nothing for POSIX-nvgpu and nvgpu_hvrtos. */
 #else
 #include <nvgpu_rmos/include/sim.h>
 #include <nvgpu_rmos/include/sim_pci.h>

drivers/gpu/nvgpu/include/nvgpu/sort.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),

drivers/gpu/nvgpu/include/nvgpu/string.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -27,6 +27,8 @@
 
 #ifdef __KERNEL__
 #include <linux/string.h>
+#elif defined(NVGPU_HVRTOS)
+#include <string.h>
 #endif
 
 struct gk20a;

drivers/gpu/nvgpu/include/nvgpu/thread.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
 
 #ifdef __KERNEL__
 #include <nvgpu/linux/thread.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/thread.h>
 #else
 #include <nvgpu/posix/thread.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/types.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2022, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
 #ifdef __KERNEL__
 #include <linux/types.h>
 #include <linux/limits.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/types.h>
 #else
 #include <nvgpu/posix/types.h>
 #endif

drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h

@@ -756,6 +756,9 @@ struct tegra_vgpu_cmd_msg {
 	} params;
 };
 
+_Static_assert(sizeof(struct tegra_vgpu_cmd_msg) <= 512U,
+	"size of tegra_vgpu_cmd_msg greater than ivc frame");
+
 enum {
 	TEGRA_VGPU_GR_INTR_NOTIFY = 0,
 	TEGRA_VGPU_GR_INTR_SEMAPHORE_TIMEOUT = 1,
@@ -870,6 +873,9 @@ struct tegra_vgpu_intr_msg {
 	} info;
 };
 
+_Static_assert(sizeof(struct tegra_vgpu_intr_msg) <= 64U,
+	"size of tegra_vgpu_intr_msg greater than ivc frame");
+
 #define TEGRA_VGPU_QUEUE_SIZES	\
 	512,			\
 	sizeof(struct tegra_vgpu_intr_msg)

drivers/gpu/nvgpu/include/nvgpu/vm.h

@@ -92,6 +92,8 @@ struct nvgpu_os_buffer;
 #include <nvgpu/linux/vm.h>
 #elif defined(__NVGPU_POSIX__)
 #include <nvgpu/posix/vm.h>
+#elif defined(NVGPU_HVRTOS)
+#include <nvgpu_hvrtos/vm.h>
 #else
 /* QNX include goes here. */
 #include <nvgpu_rmos/include/vm.h>