From 1fa65bcc135d1828da61c4a98fcd5c1259402904 Mon Sep 17 00:00:00 2001 From: Vedashree Vidwans Date: Sat, 7 Dec 2019 14:08:58 -0800 Subject: [PATCH] gpu: nvgpu: unit: mm: gp10b_fusa unit test This unit test covers most of the nvgpu.hal.mm.gp10b_fusa module lines and almost all branches. Jira NVGPU-2218 Change-Id: I16be22aefd10b8a8ee456f33619ecaf28776a072 Signed-off-by: Vedashree Vidwans Reviewed-on: https://git-master.nvidia.com/r/2248083 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- Makefile.umbrella.tmk | 1 + userspace/Makefile.sources | 1 + userspace/SWUTS.h | 1 + userspace/SWUTS.sources | 1 + userspace/required_tests.json | 30 +++ userspace/units/mm/hal/gp10b_fusa/Makefile | 26 ++ .../mm/hal/gp10b_fusa/Makefile.interface.tmk | 35 +++ .../units/mm/hal/gp10b_fusa/Makefile.tmk | 35 +++ .../units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c | 247 ++++++++++++++++++ .../units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h | 96 +++++++ 10 files changed, 473 insertions(+) create mode 100644 userspace/units/mm/hal/gp10b_fusa/Makefile create mode 100644 userspace/units/mm/hal/gp10b_fusa/Makefile.interface.tmk create mode 100644 userspace/units/mm/hal/gp10b_fusa/Makefile.tmk create mode 100644 userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c create mode 100644 userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h diff --git a/Makefile.umbrella.tmk b/Makefile.umbrella.tmk index 1cf313faa..78b905680 100644 --- a/Makefile.umbrella.tmk +++ b/Makefile.umbrella.tmk @@ -66,6 +66,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/mm/dma NV_REPOSITORY_COMPONENTS += userspace/units/mm/gmmu/pd_cache NV_REPOSITORY_COMPONENTS += userspace/units/mm/gmmu/page_table NV_REPOSITORY_COMPONENTS += userspace/units/mm/hal/cache/flush_gk20a_fusa +NV_REPOSITORY_COMPONENTS += userspace/units/mm/hal/gp10b_fusa NV_REPOSITORY_COMPONENTS += userspace/units/mm/hal/gv11b_fusa NV_REPOSITORY_COMPONENTS += userspace/units/mm/mm NV_REPOSITORY_COMPONENTS += userspace/units/mm/page_table_faults diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index b04387116..c499b1c98 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -73,6 +73,7 @@ UNITS := \ $(UNIT_SRC)/mm/gmmu/pd_cache \ $(UNIT_SRC)/mm/gmmu/page_table \ $(UNIT_SRC)/mm/hal/cache/flush_gk20a_fusa \ + $(UNIT_SRC)/mm/hal/gp10b_fusa \ $(UNIT_SRC)/mm/hal/gv11b_fusa \ $(UNIT_SRC)/mm/mm \ $(UNIT_SRC)/mm/page_table_faults \ diff --git a/userspace/SWUTS.h b/userspace/SWUTS.h index ab5f2f622..e6581c0c8 100644 --- a/userspace/SWUTS.h +++ b/userspace/SWUTS.h @@ -69,6 +69,7 @@ * - @ref SWUTS-mm-dma * - @ref SWUTS-mm-gmmu-page_table * - @ref SWUTS-mm-hal-cache-flush-gk20a-fusa + * - @ref SWUTS-mm-hal-gp10b_fusa * - @ref SWUTS-mm-hal-gv11b-fusa * - @ref SWUTS-mm-nvgpu-mem * - @ref SWUTS-mm-nvgpu-sgt diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index 47569acef..c5992fb56 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -45,6 +45,7 @@ INPUT += ../../../userspace/units/mm/as/as.h INPUT += ../../../userspace/units/mm/dma/dma.h INPUT += ../../../userspace/units/mm/gmmu/page_table/page_table.h INPUT += ../../../userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.h +INPUT += ../../../userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h INPUT += ../../../userspace/units/mm/hal/gv11b_fusa/mm-gv11b-fusa.h INPUT += ../../../userspace/units/mm/nvgpu_mem/nvgpu_mem.h INPUT += ../../../userspace/units/mm/nvgpu_sgt/nvgpu_sgt.h diff --git a/userspace/required_tests.json b/userspace/required_tests.json index fbf0abe2f..63bd2a0c5 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -1271,6 +1271,36 @@ "unit": "mm.mm", "test_level": 0 }, + { + "test": "test_env_clean", + "case": "env_clean", + "unit": "mm_gp10b_fusa", + "test_level": 0 + }, + { + "test": "test_env_init", + "case": "env_init", + "unit": "mm_gp10b_fusa", + "test_level": 0 + }, + { + "test": "test_gp10b_mm_init_bar2_vm", + "case": "mm_init_bar2_vm_s0", + "unit": "mm_gp10b_fusa", + "test_level": 0 + }, + { + "test": "test_gp10b_mm_init_bar2_vm", + "case": "mm_init_bar2_vm_s1", + "unit": "mm_gp10b_fusa", + "test_level": 0 + }, + { + "test": "test_gp10b_mm_init_bar2_vm", + "case": "mm_init_bar2_vm_s2", + "unit": "mm_gp10b_fusa", + "test_level": 0 + }, { "test": "test_env_clean", "case": "env_clean", diff --git a/userspace/units/mm/hal/gp10b_fusa/Makefile b/userspace/units/mm/hal/gp10b_fusa/Makefile new file mode 100644 index 000000000..04bb60b5a --- /dev/null +++ b/userspace/units/mm/hal/gp10b_fusa/Makefile @@ -0,0 +1,26 @@ +# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +.SUFFIXES: + +OBJS = mm-gp10b-fusa.o +MODULE = mm-gp10b-fusa + +include ../../../Makefile.units diff --git a/userspace/units/mm/hal/gp10b_fusa/Makefile.interface.tmk b/userspace/units/mm/hal/gp10b_fusa/Makefile.interface.tmk new file mode 100644 index 000000000..288312a86 --- /dev/null +++ b/userspace/units/mm/hal/gp10b_fusa/Makefile.interface.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=mm-gp10b-fusa + +include $(NV_COMPONENT_DIR)/../../../Makefile.units.common.interface.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/mm/hal/gp10b_fusa/Makefile.tmk b/userspace/units/mm/hal/gp10b_fusa/Makefile.tmk new file mode 100644 index 000000000..b2e25ce0f --- /dev/null +++ b/userspace/units/mm/hal/gp10b_fusa/Makefile.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=mm-gp10b-fusa + +include $(NV_COMPONENT_DIR)/../../../Makefile.units.common.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c new file mode 100644 index 000000000..6ef5ef503 --- /dev/null +++ b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c @@ -0,0 +1,247 @@ +/* + * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include +#include + +#include +#include +#include + +#include "os/posix/os_posix.h" + +#include "hal/fb/fb_gv11b.h" +#include "hal/fb/intr/fb_intr_gv11b.h" +#include "hal/fifo/ramin_gk20a.h" +#include "hal/fifo/ramin_gp10b.h" +#include "hal/mc/mc_gp10b.h" +#include "hal/mm/cache/flush_gk20a.h" +#include "hal/mm/gmmu/gmmu_gp10b.h" +#include "hal/mm/mm_gp10b.h" +#include "hal/mm/mm_gv11b.h" +#include "hal/mm/mmu_fault/mmu_fault_gv11b.h" + +#include + +#include +#include + +#include "mm-gp10b-fusa.h" + +/* + * Write callback (for all nvgpu_writel calls). + */ +static void writel_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + nvgpu_posix_io_writel_reg_space(g, access->addr, access->value); +} + +/* + * Read callback, similar to the write callback above. + */ +static void readl_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + access->value = nvgpu_posix_io_readl_reg_space(g, access->addr); +} + +/* + * Define all the callbacks to be used during the test. Typically all + * write operations use the same callback, likewise for all read operations. + */ +static struct nvgpu_posix_io_callbacks mmu_faults_callbacks = { + /* Write APIs all can use the same accessor. */ + .writel = writel_access_reg_fn, + .writel_check = writel_access_reg_fn, + .bar1_writel = writel_access_reg_fn, + .usermode_writel = writel_access_reg_fn, + + /* Likewise for the read APIs. */ + .__readl = readl_access_reg_fn, + .readl = readl_access_reg_fn, + .bar1_readl = readl_access_reg_fn, +}; + +static void init_platform(struct unit_module *m, struct gk20a *g, bool is_iGPU) +{ + if (is_iGPU) { + nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true); + } else { + nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, false); + } +} + +static int init_mm(struct unit_module *m, struct gk20a *g) +{ + u64 low_hole, aperture_size; + struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); + struct mm_gk20a *mm = &g->mm; + int err; + + p->mm_is_iommuable = true; + + /* Minimum HALs for page_table */ + g->ops.mm.gmmu.get_default_big_page_size = + gp10b_mm_get_default_big_page_size; + g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; + g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; + g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; + g->ops.mm.setup_hw = nvgpu_mm_setup_hw; + g->ops.fb.init_hw = gv11b_fb_init_hw; + g->ops.fb.intr.enable = gv11b_fb_intr_enable; + g->ops.mm.cache.fb_flush = gk20a_mm_fb_flush; + g->ops.mm.mmu_fault.info_mem_destroy = + gv11b_mm_mmu_fault_info_mem_destroy; + g->ops.mc.intr_stall_unit_config = mc_gp10b_intr_stall_unit_config; + + nvgpu_posix_register_io(g, &mmu_faults_callbacks); + nvgpu_posix_io_init_reg_space(g); + + /* Register space: FB_MMU */ + if (nvgpu_posix_io_add_reg_space(g, fb_niso_intr_r(), 0x800) != 0) { + unit_return_fail(m, "nvgpu_posix_io_add_reg_space failed\n"); + } + + /* + * Initialize VM space for system memory to be used throughout this + * unit module. + * Values below are similar to those used in nvgpu_init_system_vm() + */ + low_hole = SZ_4K * 16UL; + aperture_size = GK20A_PMU_VA_SIZE; + mm->pmu.aperture_size = GK20A_PMU_VA_SIZE; + + mm->pmu.vm = nvgpu_vm_init(g, + g->ops.mm.gmmu.get_default_big_page_size(), + low_hole, + aperture_size - low_hole, + aperture_size, + true, + false, + false, + "system"); + if (mm->pmu.vm == NULL) { + unit_return_fail(m, "'system' nvgpu_vm_init failed\n"); + } + + /* + * This initialization will make sure that correct aperture mask + * is returned */ + g->mm.mmu_wr_mem.aperture = APERTURE_SYSMEM; + g->mm.mmu_rd_mem.aperture = APERTURE_SYSMEM; + + /* Init MM H/W */ + err = g->ops.mm.setup_hw(g); + if (err != 0) { + unit_return_fail(m, "init_mm_setup_hw failed code=%d\n", err); + } + + return UNIT_SUCCESS; +} + +int test_env_init(struct unit_module *m, struct gk20a *g, void *args) +{ + g->log_mask = 0; + + init_platform(m, g, true); + + if (init_mm(m, g) != 0) { + unit_return_fail(m, "nvgpu_init_mm_support failed\n"); + } + + return UNIT_SUCCESS; +} + +#define F_INIT_BAR2_VM_DEFAULT 0ULL +#define F_INIT_BAR2_VM_INIT_VM_FAIL 1ULL +#define F_INIT_BAR2_VM_ALLOC_INST_BLOCK_FAIL 2ULL + +const char *m_init_bar2_vm_str[] = { + "default_input", + "vm_init_fail", + "alloc_inst_block_fail", +}; + +int test_gp10b_mm_init_bar2_vm(struct unit_module *m, struct gk20a *g, + void *args) +{ + int err; + int ret = UNIT_FAIL; + u64 branch = (u64)args; + u64 fail = F_INIT_BAR2_VM_INIT_VM_FAIL | + F_INIT_BAR2_VM_ALLOC_INST_BLOCK_FAIL; + struct nvgpu_posix_fault_inj *kmem_fi = + nvgpu_kmem_get_fault_injection(); + struct nvgpu_posix_fault_inj *dma_fi = + nvgpu_dma_alloc_get_fault_injection(); + + if ((branch & F_INIT_BAR2_VM_INIT_VM_FAIL) != 0) { + nvgpu_posix_enable_fault_injection(kmem_fi, true, 0); + } + + if ((branch & F_INIT_BAR2_VM_ALLOC_INST_BLOCK_FAIL) != 0) { + nvgpu_posix_enable_fault_injection(dma_fi, true, 1); + } + + err = gp10b_mm_init_bar2_vm(g); + + if (branch & fail) { + nvgpu_posix_enable_fault_injection(kmem_fi, false, 0); + nvgpu_posix_enable_fault_injection(dma_fi, false, 0); + unit_assert(err != 0, goto done); + } else { + unit_assert(err == 0, goto done); + gp10b_mm_remove_bar2_vm(g); + } + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s: failed at %s\n", __func__, + m_init_bar2_vm_str[branch]); + } + return ret; +} + +int test_env_clean(struct unit_module *m, struct gk20a *g, void *args) +{ + g->log_mask = 0; + g->ops.mm.mmu_fault.info_mem_destroy(g); + nvgpu_vm_put(g->mm.pmu.vm); + + return UNIT_SUCCESS; +} + +struct unit_module_test mm_gp10b_fusa_tests[] = { + UNIT_TEST(env_init, test_env_init, (void *)0, 0), + UNIT_TEST(mm_init_bar2_vm_s0, test_gp10b_mm_init_bar2_vm, (void *)F_INIT_BAR2_VM_DEFAULT, 0), + UNIT_TEST(mm_init_bar2_vm_s1, test_gp10b_mm_init_bar2_vm, (void *)F_INIT_BAR2_VM_INIT_VM_FAIL, 0), + UNIT_TEST(mm_init_bar2_vm_s2, test_gp10b_mm_init_bar2_vm, (void *)F_INIT_BAR2_VM_ALLOC_INST_BLOCK_FAIL, 0), + UNIT_TEST(env_clean, test_env_clean, NULL, 0), +}; + +UNIT_MODULE(mm_gp10b_fusa, mm_gp10b_fusa_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h new file mode 100644 index 000000000..ed60365c2 --- /dev/null +++ b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef UNIT_MM_HAL_GP10B_FUSA_H +#define UNIT_MM_HAL_GP10B_FUSA_H + +struct gk20a; +struct unit_module; + +/** @addtogroup SWUTS-mm-hal-gp10b_fusa + * @{ + * + * Software Unit Test Specification for mm.hal.gp10b_fusa + */ + +/** + * Test specification for: test_env_init + * + * Description: Initialize environment for MM tests + * + * Test Type: Feature based + * + * Targets: None + * + * Input: None + * + * Steps: + * - Init HALs and initialize VMs similar to nvgpu_init_system_vm(). + * + * Output: Returns SUCCESS if the steps above were executed successfully. FAIL + * otherwise. + */ +int test_env_init(struct unit_module *m, struct gk20a *g, void *args); + +/** + * Test specification for: test_gp10b_mm_init_bar2_vm + * + * Description: Initialize bar2 VM + * + * Test Type: Feature based + * + * Targets: gp10b_mm_init_bar2_vm, gp10b_mm_remove_bar2_vm + * + * Input: test_env_init, args (value can be F_INIT_BAR2_VM_DEFAULT, + * F_INIT_BAR2_VM_INIT_VM_FAIL or F_INIT_BAR2_VM_ALLOC_INST_BLOCK_FAIL) + * + * Steps: + * - Allocate and initialize bar2 VM. + * - Check failure cases when allocation fails. + * + * Output: Returns SUCCESS if the steps above were executed successfully. FAIL + * otherwise. + */ +int test_gp10b_mm_init_bar2_vm(struct unit_module *m, struct gk20a *g, + void *args); + +/** + * Test specification for: test_env_clean + * + * Description: Cleanup test environment + * + * Test Type: Feature based + * + * Targets: None + * + * Input: test_env_init + * + * Steps: + * - Destroy memory and VMs initialized for the test. + * + * Output: Returns SUCCESS if the steps above were executed successfully. FAIL + * otherwise. + */ +int test_env_clean(struct unit_module *m, struct gk20a *g, void *args); + +/** @} */ +#endif /* UNIT_MM_HAL_GP10B_FUSA_H */