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gpu: nvgpu: remove aggressive sync init from platform
Remove the boolean aggressive_sync_destroy flag from struct gk20a_platform; only the threshold to set the channel limit is useful in the platform data. The boolean flag is a runtime condition and it always starts as false. Jira NVGPU-4548 Change-Id: I1a4b9903978ab239581857ff791a7983f59fdc13 Signed-off-by: Konsta Hölttä <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2331357 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
0b70fff5db
commit
2001b8ec97
@@ -177,7 +177,6 @@ static void nvgpu_init_pm_vars(struct gk20a *g)
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nvgpu_set_enabled(g, NVGPU_GPU_CAN_BLCG,
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nvgpu_set_enabled(g, NVGPU_GPU_CAN_BLCG,
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nvgpu_platform_is_silicon(g) ? platform->can_blcg : false);
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nvgpu_platform_is_silicon(g) ? platform->can_blcg : false);
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g->aggressive_sync_destroy = platform->aggressive_sync_destroy;
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g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
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g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
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#ifdef CONFIG_NVGPU_SUPPORT_CDE
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#ifdef CONFIG_NVGPU_SUPPORT_CDE
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g->has_cde = platform->has_cde;
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g->has_cde = platform->has_cde;
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@@ -87,9 +87,6 @@ struct gk20a_platform {
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/* channel limit after which to start aggressive sync destroy */
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/* channel limit after which to start aggressive sync destroy */
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unsigned int aggressive_sync_destroy_thresh;
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unsigned int aggressive_sync_destroy_thresh;
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/* flag to set sync destroy aggressiveness */
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bool aggressive_sync_destroy;
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/* set if ASPM should be disabled on boot; only makes sense for PCI */
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/* set if ASPM should be disabled on boot; only makes sense for PCI */
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bool disable_aspm;
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bool disable_aspm;
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@@ -98,7 +98,6 @@ static void vgpu_init_vars(struct gk20a *g, struct gk20a_platform *platform)
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nvgpu_atomic_set(&g->clk_arb_global_nr, 0);
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nvgpu_atomic_set(&g->clk_arb_global_nr, 0);
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g->aggressive_sync_destroy = platform->aggressive_sync_destroy;
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g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
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g->aggressive_sync_destroy_thresh = platform->aggressive_sync_destroy_thresh;
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nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
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nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
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g->ptimer_src_freq = platform->ptimer_src_freq;
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g->ptimer_src_freq = platform->ptimer_src_freq;
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