From 20114c7c8ce11a8900e20c6f87acfe52915923d5 Mon Sep 17 00:00:00 2001 From: Scott Long Date: Fri, 10 Jan 2020 10:40:24 -0800 Subject: [PATCH] gpu: nvgpu: acr: misra 12.1 fixes MISRA Advisory Rule states that the precedence of operators within expressions should be made explicit. This change removes the Advisory Rule 12.1 violations from acr code. Jira NVGPU-3178 Change-Id: Ibfcb23dbf9931efd1890c9b548c36462c55ae47d Signed-off-by: Scott Long Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277477 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/acr/acr.c | 6 +++--- drivers/gpu/nvgpu/common/acr/acr_blob_construct.c | 4 ++-- drivers/gpu/nvgpu/common/acr/acr_bootstrap.c | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/nvgpu/common/acr/acr.c b/drivers/gpu/nvgpu/common/acr/acr.c index 3240f52d0..cc834b886 100644 --- a/drivers/gpu/nvgpu/common/acr/acr.c +++ b/drivers/gpu/nvgpu/common/acr/acr.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -50,8 +50,8 @@ bool nvgpu_acr_is_lsf_lazy_bootstrap(struct gk20a *g, struct nvgpu_acr *acr, return false; } - if (falcon_id == FALCON_ID_FECS || falcon_id == FALCON_ID_PMU || - falcon_id == FALCON_ID_GPCCS) { + if ((falcon_id == FALCON_ID_FECS) || (falcon_id == FALCON_ID_PMU) || + (falcon_id == FALCON_ID_GPCCS)) { return acr->lsf[falcon_id].is_lazy_bootstrap; } else { nvgpu_err(g, "Invalid falcon id\n"); diff --git a/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c b/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c index ecbbd3bea..ef5cc6c1c 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c +++ b/drivers/gpu/nvgpu/common/acr/acr_blob_construct.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -449,7 +449,7 @@ static int lsfm_discover_ucode_images(struct gk20a *g, */ for (i = 0U; i < FALCON_ID_END; i++) { if (nvgpu_test_bit(i, (void *)&acr->lsf_enable_mask) && - acr->lsf[i].get_lsf_ucode_details != NULL) { + (acr->lsf[i].get_lsf_ucode_details != NULL)) { (void) memset(&ucode_img, 0, sizeof(ucode_img)); err = acr->lsf[i].get_lsf_ucode_details(g, diff --git a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c index a062b86a4..7c42772a0 100644 --- a/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c +++ b/drivers/gpu/nvgpu/common/acr/acr_bootstrap.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -132,7 +132,7 @@ static int acr_ucode_patch_sig(struct gk20a *g, /* Patching logic:*/ sig_size = sig_size / 4U; - for (i = 0U; i < sizeof(*p_patch_loc)>>2U; i++) { + for (i = 0U; i < (sizeof(*p_patch_loc)>>2U); i++) { for (j = 0U; j < sig_size; j++) { p_img[nvgpu_safe_add_u32((p_patch_loc[i]>>2U), j)] = p_sig[nvgpu_safe_add_u32((p_patch_ind[i]<<2U), j)];