From 21e1328ea18b94908ab7a0fcc8133d17fe45ebb5 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Tue, 30 Mar 2021 10:16:09 -0700 Subject: [PATCH] gpu: nvgpu: add fb gops for set_atomic_mode Separated set_atomic_mode functionality from init_fs_state/enable_nvlink and created new fb gops for set_atomic_mode. In gpu init sequence, set_atomic_mode is called after acr_construct_execute to take care of design changes required for nvgpu-next architectures. Updated fb_gv11b_init_test to use set_atomic_mode gops along with init_fs_state. Bug 3268664 Change-Id: I1ab9eb21cc4cce77f3325c4e8821a75b6e85fba2 Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2508095 Tested-by: mobile promotions Reviewed-by: mobile promotions --- drivers/gpu/nvgpu/common/init/nvgpu_init.c | 8 ++++++++ drivers/gpu/nvgpu/hal/fb/fb_gv100.c | 11 +++++++++-- drivers/gpu/nvgpu/hal/fb/fb_gv100.h | 3 ++- drivers/gpu/nvgpu/hal/fb/fb_gv11b.h | 3 ++- drivers/gpu/nvgpu/hal/fb/fb_gv11b_fusa.c | 8 ++++---- drivers/gpu/nvgpu/hal/fb/fb_tu104.c | 20 +++++++++++--------- drivers/gpu/nvgpu/hal/fb/fb_tu104.h | 3 ++- drivers/gpu/nvgpu/hal/init/hal_gv11b.c | 1 + drivers/gpu/nvgpu/hal/init/hal_tu104.c | 1 + drivers/gpu/nvgpu/include/nvgpu/gops/fb.h | 19 ++++++++++++++----- libs/igpu/libnvgpu-drv-igpu_safe.export | 1 + userspace/units/fb/fb_gv11b_fusa.c | 4 +++- 12 files changed, 58 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c index f2688a2e2..1ebd33212 100644 --- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c +++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c @@ -672,6 +672,14 @@ int nvgpu_finalize_poweron(struct gk20a *g) NVGPU_INIT_TABLE_ENTRY(&nvgpu_gr_enable_hw, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(g->ops.acr.acr_construct_execute, NVGPU_SEC_PRIVSECURITY), + /** + * Set atomic mode after acr boot(See Bug 3268664 for + * details). For acr to boot, nvgpu_init_fb_support + * and init_mm_support is required. + * So, set_atomic_mode is decoupled from nvgpu_init_fb_support + * in the init sequence and called after acr boot. + */ + NVGPU_INIT_TABLE_ENTRY(g->ops.fb.set_atomic_mode, NO_FLAG), #ifdef CONFIG_NVGPU_DGPU NVGPU_INIT_TABLE_ENTRY(g->ops.sec2.init_sec2_support, NVGPU_SUPPORT_SEC2_RTOS), diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv100.c b/drivers/gpu/nvgpu/hal/fb/fb_gv100.c index 4ad43ca83..3313319a8 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv100.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv100.c @@ -1,7 +1,7 @@ /* * GV100 FB * - * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -234,6 +234,13 @@ int gv100_fb_enable_nvlink(struct gk20a *g) fb_niso_cfg1_sysmem_nvlink_enabled_f()); nvgpu_writel(g, fb_niso_cfg1_r(), data); + return 0; +} + +int gv100_fb_set_atomic_mode(struct gk20a *g) +{ + u32 data; + /* Setup atomics */ data = nvgpu_readl(g, fb_mmu_ctrl_r()); data = set_field(data, fb_mmu_ctrl_atomic_capability_mode_m(), @@ -299,4 +306,4 @@ void gv100_fb_set_mmu_debug_mode(struct gk20a *g, bool enable) fb_hsmmu_pri_mmu_debug_ctrl_debug_m(), hsmmu_ctrl); nvgpu_writel(g, fb_hsmmu_pri_mmu_debug_ctrl_r(), data); } -#endif \ No newline at end of file +#endif diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv100.h b/drivers/gpu/nvgpu/hal/fb/fb_gv100.h index 7aacb8607..a97a71134 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv100.h +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv100.h @@ -1,7 +1,7 @@ /* * GV100 FB * - * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -31,6 +31,7 @@ void gv100_fb_reset(struct gk20a *g); int gv100_fb_memory_unlock(struct gk20a *g); int gv100_fb_init_nvlink(struct gk20a *g); int gv100_fb_enable_nvlink(struct gk20a *g); +int gv100_fb_set_atomic_mode(struct gk20a *g); #ifdef CONFIG_NVGPU_DGPU size_t gv100_fb_get_vidmem_size(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv11b.h b/drivers/gpu/nvgpu/hal/fb/fb_gv11b.h index 1f281be8c..75ac91371 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv11b.h +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv11b.h @@ -1,7 +1,7 @@ /* * GV11B FB * - * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -29,6 +29,7 @@ struct gk20a; void gv11b_fb_init_hw(struct gk20a *g); void gv11b_fb_init_fs_state(struct gk20a *g); +int gv11b_fb_set_atomic_mode(struct gk20a *g); #ifdef CONFIG_NVGPU_COMPRESSION struct nvgpu_cbc; diff --git a/drivers/gpu/nvgpu/hal/fb/fb_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/fb/fb_gv11b_fusa.c index 259bf7ae5..f48def684 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_gv11b_fusa.c @@ -1,7 +1,7 @@ /* * GV11B FB * - * Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -59,7 +59,7 @@ static void gv11b_init_nvlink_soc_credits(struct gk20a *g) #endif } -static void gv11b_fb_set_atomic_mode(struct gk20a *g) +int gv11b_fb_set_atomic_mode(struct gk20a *g) { u32 reg_val; @@ -85,6 +85,8 @@ static void gv11b_fb_set_atomic_mode(struct gk20a *g) nvgpu_log(g, gpu_dbg_info, "fb_hshub_num_active_ltcs_r 0x%x", nvgpu_readl(g, fb_hshub_num_active_ltcs_r())); + + return 0; } void gv11b_fb_init_hw(struct gk20a *g) @@ -100,8 +102,6 @@ void gv11b_fb_init_fs_state(struct gk20a *g) gv11b_init_nvlink_soc_credits(g); - gv11b_fb_set_atomic_mode(g); - nvgpu_log(g, gpu_dbg_info, "fbhub active ltcs %x", nvgpu_readl(g, fb_fbhub_num_active_ltcs_r())); diff --git a/drivers/gpu/nvgpu/hal/fb/fb_tu104.c b/drivers/gpu/nvgpu/hal/fb/fb_tu104.c index 174dc6180..f5389ca41 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_tu104.c +++ b/drivers/gpu/nvgpu/hal/fb/fb_tu104.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -284,15 +284,17 @@ size_t tu104_fb_get_vidmem_size(struct gk20a *g) int tu104_fb_enable_nvlink(struct gk20a *g) { - int ret = 0; - u32 data; - nvgpu_log(g, gpu_dbg_nvlink|gpu_dbg_info, "enabling nvlink"); - ret = gv100_fb_enable_nvlink(g); - if (ret != 0) { - return ret; - } + return gv100_fb_enable_nvlink(g); + +} + +int tu104_fb_set_atomic_mode(struct gk20a *g) +{ + u32 data; + + gv100_fb_set_atomic_mode(g); /* NV_PFB_PRI_MMU_CTRL_ATOMIC_CAPABILITY_SYS_NCOH_MODE to L2 */ data = nvgpu_readl(g, fb_mmu_ctrl_r()); @@ -307,5 +309,5 @@ int tu104_fb_enable_nvlink(struct gk20a *g) fb_fbhub_num_active_ltcs_hub_sys_ncoh_atomic_mode_use_read_f()); nvgpu_writel(g, fb_fbhub_num_active_ltcs_r(), data); - return ret; + return 0; } diff --git a/drivers/gpu/nvgpu/hal/fb/fb_tu104.h b/drivers/gpu/nvgpu/hal/fb/fb_tu104.h index 1428610e5..648998e83 100644 --- a/drivers/gpu/nvgpu/hal/fb/fb_tu104.h +++ b/drivers/gpu/nvgpu/hal/fb/fb_tu104.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -38,5 +38,6 @@ int tu104_fb_apply_pdb_cache_war(struct gk20a *g); size_t tu104_fb_get_vidmem_size(struct gk20a *g); #endif int tu104_fb_enable_nvlink(struct gk20a *g); +int tu104_fb_set_atomic_mode(struct gk20a *g); #endif /* NVGPU_FB_TU104_H */ diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index 01476bb84..8d716f70e 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -731,6 +731,7 @@ static const struct gops_fb gv11b_ops_fb = { #endif /* CONFIG_NVGPU_INJECT_HWERR */ .init_hw = gv11b_fb_init_hw, .init_fs_state = gv11b_fb_init_fs_state, + .set_atomic_mode = gv11b_fb_set_atomic_mode, .set_mmu_page_size = NULL, .mmu_ctrl = gm20b_fb_mmu_ctrl, .mmu_debug_ctrl = gm20b_fb_mmu_debug_ctrl, diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 576407200..e9c7e8c76 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -781,6 +781,7 @@ static const struct gops_fb tu104_ops_fb = { .fbpa_ecc_free = tu104_fbpa_ecc_free, .init_hw = gv11b_fb_init_hw, .init_fs_state = gp106_fb_init_fs_state, + .set_atomic_mode = tu104_fb_set_atomic_mode, .set_mmu_page_size = NULL, .mmu_ctrl = gm20b_fb_mmu_ctrl, .mmu_debug_ctrl = gm20b_fb_mmu_debug_ctrl, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops/fb.h b/drivers/gpu/nvgpu/include/nvgpu/gops/fb.h index 57a7e7331..ac2b51c23 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops/fb.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops/fb.h @@ -193,11 +193,7 @@ struct gops_fb { * * @param g [in] Pointer to GPU driver struct. * - * This function enables platform atomic capability mode to rmw atomic - * through following configuration: - * NV_PFB_PRI_MMU_CTRL_ATOMIC_CAPABILITY_MODE to RMW MODE - * NV_PFB_PRI_MMU_CTRL_ATOMIC_CAPABILITY_SYS_NCOH_MODE to L2 - * NV_PFB_HSHUB_NUM_ACTIVE_LTCS_HUB_SYS_ATOMIC_MODE to USE_RMW + * This function initializes chip specific fb state. */ void (*init_fs_state)(struct gk20a *g); @@ -364,6 +360,19 @@ struct gops_fb { */ void (*fault_buf_set_state_hw)(struct gk20a *g, u32 index, u32 state); + /** + * @brief Set atomic mode + * + * @param g [in] Pointer to GPU driver struct. + * + * This function sets platform atomic capability mode to rmw atomics + * for fb_mmu, fbhub and hshub(s). Also sets platform atomic capability + * non-coherent mode to l2 for fb_mmu. + * + * @return 0. + */ + int (*set_atomic_mode)(struct gk20a *g); + struct gops_fb_ecc ecc; struct gops_fb_intr intr; diff --git a/libs/igpu/libnvgpu-drv-igpu_safe.export b/libs/igpu/libnvgpu-drv-igpu_safe.export index 6290c6efe..fc3e3c38d 100644 --- a/libs/igpu/libnvgpu-drv-igpu_safe.export +++ b/libs/igpu/libnvgpu-drv-igpu_safe.export @@ -122,6 +122,7 @@ gv11b_fb_fault_buffer_size_val gv11b_fb_handle_bar2_fault gv11b_fb_handle_mmu_fault gv11b_fb_init_fs_state +gv11b_fb_set_atomic_mode gv11b_fb_init_hw gv11b_fb_intr_disable gv11b_fb_intr_enable diff --git a/userspace/units/fb/fb_gv11b_fusa.c b/userspace/units/fb/fb_gv11b_fusa.c index ef26d3799..cfd59a7fb 100644 --- a/userspace/units/fb/fb_gv11b_fusa.c +++ b/userspace/units/fb/fb_gv11b_fusa.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -48,6 +48,7 @@ int fb_gv11b_init_test(struct unit_module *m, struct gk20a *g, void *args) g->ops.ecc.ecc_init_support = nvgpu_ecc_init_support; g->ops.fb.init_hw = gv11b_fb_init_hw; g->ops.fb.init_fs_state = gv11b_fb_init_fs_state; + g->ops.fb.set_atomic_mode = gv11b_fb_set_atomic_mode; g->ops.fb.ecc.init = gv11b_fb_ecc_init; g->ops.fb.ecc.free = gv11b_fb_ecc_free; g->ops.fb.ecc.l2tlb_error_mask = gv11b_fb_ecc_l2tlb_error_mask; @@ -83,6 +84,7 @@ int fb_gv11b_init_test(struct unit_module *m, struct gk20a *g, void *args) } g->ops.fb.init_fs_state(g); + g->ops.fb.set_atomic_mode(g); /* Ensure atomic mode was enabled */ if ((nvgpu_readl(g, fb_mmu_ctrl_r()) & fb_mmu_ctrl_atomic_capability_mode_m()) == 0) {