From 23cda4f4a9bb4bb7cba09ef0be33251eba1efa6b Mon Sep 17 00:00:00 2001 From: Sami Kiminki Date: Mon, 18 May 2020 16:43:52 +0300 Subject: [PATCH] gpu: nvgpu: add PDI for TU104 (Linux) Add reporting for the per-device identifier (PDI) in the Linux GPU characteristics. Implement PDI read for TU104. Bug 2957580 Signed-off-by: Sami Kiminki Change-Id: I6ac0e4f74378564d82955b431d4c1fd6c0daeb13 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2346933 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: Lakshmanan M Reviewed-by: Konsta Holtta Reviewed-by: Deepak Nibade Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- arch/nvgpu-hal-new.yaml | 4 +- drivers/gpu/nvgpu/Makefile | 1 + drivers/gpu/nvgpu/Makefile.sources | 1 + drivers/gpu/nvgpu/common/init/nvgpu_init.c | 14 +++++++ drivers/gpu/nvgpu/hal/fuse/fuse_tu104.c | 40 +++++++++++++++++++ drivers/gpu/nvgpu/hal/fuse/fuse_tu104.h | 32 +++++++++++++++ drivers/gpu/nvgpu/hal/init/hal_tu104.c | 3 ++ drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 6 +++ drivers/gpu/nvgpu/include/nvgpu/gops_fuse.h | 22 ++++++++++ .../include/nvgpu/hw/tu104/hw_fuse_tu104.h | 6 ++- drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c | 2 + include/uapi/linux/nvgpu.h | 2 + 12 files changed, 130 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/nvgpu/hal/fuse/fuse_tu104.c create mode 100644 drivers/gpu/nvgpu/hal/fuse/fuse_tu104.h diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml index 396d511dd..3c67043d5 100644 --- a/arch/nvgpu-hal-new.yaml +++ b/arch/nvgpu-hal-new.yaml @@ -349,7 +349,9 @@ fuse: owner: Seema K sources: [ hal/fuse/fuse_gm20b.c, hal/fuse/fuse_gp106.c, - hal/fuse/fuse_gp106.h ] + hal/fuse/fuse_gp106.h, + hal/fuse/fuse_tu104.c, + hal/fuse/fuse_tu104.h ] gsp: safe: no diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 8b8c086ae..fffc055c3 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -128,6 +128,7 @@ nvgpu-$(CONFIG_NVGPU_DGPU) += \ hal/fifo/runlist_fifo_tu104.o \ hal/fifo/fifo_intr_gv100.o \ hal/fuse/fuse_gp106.o \ + hal/fuse/fuse_tu104.o \ hal/netlist/netlist_gv100.o \ hal/netlist/netlist_tu104.o \ hal/nvdec/nvdec_gp106.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index f01572d23..3363110f5 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -640,6 +640,7 @@ srcs += common/sec2/sec2.c \ hal/fifo/runlist_fifo_tu104.c \ hal/fifo/fifo_intr_gv100.c \ hal/fuse/fuse_gp106.c \ + hal/fuse/fuse_tu104.c \ hal/netlist/netlist_gv100.c \ hal/netlist/netlist_tu104.c \ hal/nvdec/nvdec_gp106.c \ diff --git a/drivers/gpu/nvgpu/common/init/nvgpu_init.c b/drivers/gpu/nvgpu/common/init/nvgpu_init.c index 1c6dd731a..bc810c361 100644 --- a/drivers/gpu/nvgpu/common/init/nvgpu_init.c +++ b/drivers/gpu/nvgpu/common/init/nvgpu_init.c @@ -456,6 +456,18 @@ static int nvgpu_init_boot_clk_or_clk_arb(struct gk20a *g) return err; } +static int nvgpu_init_per_device_identifier(struct gk20a *g) +{ + int err = 0; + + if (g->ops.fuse.read_per_device_identifier != NULL) { + err = g->ops.fuse.read_per_device_identifier( + g, &g->per_device_identifier); + } + + return err; +} + static int nvgpu_init_set_debugger_mode(struct gk20a *g) { #ifdef CONFIG_NVGPU_DEBUGGER @@ -663,6 +675,8 @@ int nvgpu_finalize_poweron(struct gk20a *g) #endif NVGPU_INIT_TABLE_ENTRY(g->ops.chip_init_gpu_characteristics, NO_FLAG), + NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_per_device_identifier, + NO_FLAG), NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_set_debugger_mode, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(g->ops.ce.ce_init_support, NO_FLAG), #ifdef CONFIG_NVGPU_DGPU diff --git a/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.c b/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.c new file mode 100644 index 000000000..d448dd48b --- /dev/null +++ b/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.c @@ -0,0 +1,40 @@ +/* + * TU104 FUSE + * + * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include "fuse_tu104.h" + +#include + +int tu104_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi) +{ + u32 lo = nvgpu_readl(g, fuse_opt_pdi_0_r()); + u32 hi = nvgpu_readl(g, fuse_opt_pdi_1_r()); + + *pdi = ((u64)lo) | (((u64)hi) << 32); + + return 0; +} diff --git a/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.h b/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.h new file mode 100644 index 000000000..7430f9ca1 --- /dev/null +++ b/drivers/gpu/nvgpu/hal/fuse/fuse_tu104.h @@ -0,0 +1,32 @@ +/* + * TU104 FUSE + * + * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef NVGPU_FUSE_TU104_H +#define NVGPU_FUSE_TU104_H + +struct gk20a; + +int tu104_fuse_read_per_device_identifier(struct gk20a *g, u64 *pdi); + +#endif /* NVGPU_FUSE_TU104_H */ diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index af0232bf5..363461814 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -76,6 +76,7 @@ #include "hal/fuse/fuse_gm20b.h" #include "hal/fuse/fuse_gp10b.h" #include "hal/fuse/fuse_gp106.h" +#include "hal/fuse/fuse_tu104.h" #ifdef CONFIG_NVGPU_RECOVERY #include "hal/rc/rc_gv11b.h" #endif @@ -1534,6 +1535,8 @@ static const struct gpu_ops tu104_ops = { gp106_fuse_read_vin_cal_slope_intercept_fuse, .read_vin_cal_gain_offset_fuse = gp106_fuse_read_vin_cal_gain_offset_fuse, + .read_per_device_identifier = + tu104_fuse_read_per_device_identifier, }, #if defined(CONFIG_NVGPU_NVLINK) .nvlink = { diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 7af551f2b..9e8e7ab9a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -959,6 +959,12 @@ struct gk20a { u16 pci_class; u8 pci_revision; + /** + * The per-device identifier. The iGPUs without a PDI will use + * the SoC PDI if one exists. Zero if neither exists. + */ + u64 per_device_identifier; + /* * PCI power management: i2c device index, port and address for * INA3221. diff --git a/drivers/gpu/nvgpu/include/nvgpu/gops_fuse.h b/drivers/gpu/nvgpu/include/nvgpu/gops_fuse.h index 807dd6170..9840c9217 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gops_fuse.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gops_fuse.h @@ -193,6 +193,28 @@ struct gops_fuse { int (*read_vin_cal_gain_offset_fuse)(struct gk20a *g, u32 vin_id, s8 *gain, s8 *offset); + + /** + * @brief Read the 64-bit per-device identifier (PDI). + * + * On GPUs where available, the HAL reads NV_FUSE_OPT_PDI_0 + * and NV_FUSE_OPT_PDI_1. Combined, these give the 64-bit + * per-device identifier (PDI). + * + * On GP10B/GV11B, this function reads the 64-bit SoC PDI from + * FUSE_PDI0 and FUSE_PDI1. + * + * Null PDI (0) is returned when the device does not have a + * PDI. Errors are returned when there was an error + * determining the PDI. + * + * @param g [in] The GPU driver struct. + * @param val [out] Pointer to receive the PDI on success. + * + * @return 0 on success. + */ + int (*read_per_device_identifier)(struct gk20a *g, u64 *pdi); + #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) #include "include/nvgpu/nvgpu_next_gops_fuse.h" #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_fuse_tu104.h b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_fuse_tu104.h index fe8de389f..cc4ae2e0b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_fuse_tu104.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/tu104/hw_fuse_tu104.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -72,7 +72,9 @@ (nvgpu_safe_add_u32(0x00021d70U, nvgpu_safe_mult_u32((i), 4U))) #define fuse_status_opt_fbp_r() (0x00021d38U) #define fuse_status_opt_fbp_idx_v(r, i)\ - (((r) >> (0U + i*1U)) & 0x1U) + (((r) >> (0U + (i)*1U)) & 0x1U) #define fuse_opt_ecc_en_r() (0x00021228U) #define fuse_opt_feature_fuses_override_disable_r() (0x000213f0U) +#define fuse_opt_pdi_0_r() (0x00021344U) +#define fuse_opt_pdi_1_r() (0x00021348U) #endif diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c index 01f5c3d29..4f336de38 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c @@ -408,6 +408,8 @@ gk20a_ctrl_ioctl_gpu_characteristics( gpu.pci_class = g->pci_class; gpu.pci_revision = g->pci_revision; + gpu.per_device_identifier = g->per_device_identifier; + nvgpu_set_preemption_mode_flags(g, &gpu); if (request->gpu_characteristics_buf_size > 0) { diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index fc93f3101..7938245db 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -297,6 +297,8 @@ struct nvgpu_gpu_characteristics { __u32 max_ctxsw_ring_buffer_size; __u32 reserved3; + __u64 per_device_identifier; + /* Notes: - This struct can be safely appended with new fields. However, always keep the structure size multiple of 8 and make sure that the binary