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gpu: nvgpu: ga10b: Disable compression on Av+L/Q
GPU HW expects physically contiguous addresses when clearing the compression bit store in memory. Currently on hypervisor setup, the DMA_ATTR_FORCE_CONTIGUOUS flag ensures contiguous IPA, but it is not possible to ensure contiguous physical memory.Disable compression on virtualized environments until physically contiguous memory is feasible. Buffer Metadata support is dependent on compression support. Move the initialization of NVGPU_SUPPORT_BUFFER_METADATA flag to common code where NVGPU_SUPPORT_COMPRESSION is initialized. Bug 200780546 Change-Id: Id94bffc878e275a80948880f0475162d0bb4ddae Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2607830 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1928,6 +1928,7 @@ int ga100_init_hal(struct gk20a *g)
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_POST_L2_COMPRESSION, false);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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@@ -1890,10 +1890,15 @@ int ga10b_init_hal(struct gk20a *g)
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#endif
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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if (nvgpu_is_hypervisor_mode(g)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, false);
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} else {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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}
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_POST_L2_COMPRESSION, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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@@ -1225,7 +1225,9 @@ int gm20b_init_hal(struct gk20a *g)
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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gops->cbc.alloc_comptags = NULL;
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@@ -1318,7 +1318,9 @@ int gp10b_init_hal(struct gk20a *g)
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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gops->cbc.alloc_comptags = NULL;
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@@ -1596,7 +1596,9 @@ int gv11b_init_hal(struct gk20a *g)
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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gops->cbc.alloc_comptags = NULL;
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@@ -1853,7 +1853,9 @@ int tu104_init_hal(struct gk20a *g)
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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}
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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} else {
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gops->cbc.init = NULL;
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gops->cbc.ctrl = NULL;
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gops->cbc.alloc_comptags = NULL;
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@@ -1206,8 +1206,9 @@ int vgpu_ga10b_init_hal(struct gk20a *g)
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priv->constants.max_sm_diversity_config_count;
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_POST_L2_COMPRESSION, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, false);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_POST_L2_COMPRESSION, false);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, false);
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#endif
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#ifdef CONFIG_NVGPU_RECOVERY
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@@ -1175,6 +1175,7 @@ int vgpu_gv11b_init_hal(struct gk20a *g)
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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#endif
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#ifdef CONFIG_NVGPU_RECOVERY
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@@ -330,9 +330,6 @@ void gk20a_init_linux_characteristics(struct gk20a *g)
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nvgpu_set_enabled(g, NVGPU_SUPPORT_DETERMINISTIC_OPTS, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_USERSPACE_MANAGED_AS, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_REMAP, true);
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#ifdef CONFIG_NVGPU_COMPRESSION
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nvgpu_set_enabled(g, NVGPU_SUPPORT_BUFFER_METADATA, true);
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#endif
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if (!IS_ENABLED(CONFIG_NVGPU_SYNCFD_NONE)) {
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nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNC_FENCE_FDS, true);
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