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gpu: nvgpu: remove redundant lock

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"isr_enable_lock" was used to protect pmu's isr_enabled flag
and pmu enable/disable calls

Instead of this extra lock, we can reuse "isr_mutex" for this
purpose

Bug 200014542
Bug 200014887

Change-Id: Ifbb7d6108effc132266a20517820e470d52a7110
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/453348
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2014-08-06 12:03:45 +05:30
committed by Dan Willemsen
parent fff31d310c
commit 2489960344
3 changed files with 8 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
View File

@@ -636,7 +636,6 @@ int gk20a_init_pmu(struct pmu_gk20a *pmu)
mutex_init(&pmu->elpg_mutex); mutex_init(&pmu->elpg_mutex);
mutex_init(&pmu->isr_mutex); mutex_init(&pmu->isr_mutex);
mutex_init(&pmu->isr_enable_lock);
mutex_init(&pmu->pmu_copy_lock); mutex_init(&pmu->pmu_copy_lock);
mutex_init(&pmu->pmu_seq_lock); mutex_init(&pmu->pmu_seq_lock);
@@ -2076,10 +2075,10 @@ int gk20a_init_pmu_setup_hw1(struct gk20a *g)
gk20a_dbg_fn(""); gk20a_dbg_fn("");
mutex_lock(&pmu->isr_enable_lock); mutex_lock(&pmu->isr_mutex);
pmu_reset(pmu); pmu_reset(pmu);
pmu->isr_enabled = true; pmu->isr_enabled = true;
mutex_unlock(&pmu->isr_enable_lock); mutex_unlock(&pmu->isr_mutex);
/* setup apertures - virtual */ /* setup apertures - virtual */
gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE),
@@ -3192,14 +3191,12 @@ void gk20a_pmu_isr(struct gk20a *g)
gk20a_dbg_fn(""); gk20a_dbg_fn("");
mutex_lock(&pmu->isr_enable_lock); mutex_lock(&pmu->isr_mutex);
if (!pmu->isr_enabled) { if (!pmu->isr_enabled) {
mutex_unlock(&pmu->isr_enable_lock); mutex_unlock(&pmu->isr_mutex);
return; return;
} }
mutex_lock(&pmu->isr_mutex);
mask = gk20a_readl(g, pwr_falcon_irqmask_r()) & mask = gk20a_readl(g, pwr_falcon_irqmask_r()) &
gk20a_readl(g, pwr_falcon_irqdest_r()); gk20a_readl(g, pwr_falcon_irqdest_r());
@@ -3210,7 +3207,6 @@ void gk20a_pmu_isr(struct gk20a *g)
if (!intr || pmu->pmu_state == PMU_STATE_OFF) { if (!intr || pmu->pmu_state == PMU_STATE_OFF) {
gk20a_writel(g, pwr_falcon_irqsclr_r(), intr); gk20a_writel(g, pwr_falcon_irqsclr_r(), intr);
mutex_unlock(&pmu->isr_mutex); mutex_unlock(&pmu->isr_mutex);
mutex_unlock(&pmu->isr_enable_lock);
return; return;
} }
@@ -3243,7 +3239,6 @@ void gk20a_pmu_isr(struct gk20a *g)
} }
mutex_unlock(&pmu->isr_mutex); mutex_unlock(&pmu->isr_mutex);
mutex_unlock(&pmu->isr_enable_lock);
} }
static bool pmu_validate_cmd(struct pmu_gk20a *pmu, struct pmu_cmd *cmd, static bool pmu_validate_cmd(struct pmu_gk20a *pmu, struct pmu_cmd *cmd,
@@ -3661,10 +3656,10 @@ int gk20a_pmu_destroy(struct gk20a *g)
g->pg_ungating_time_us += (u64)elpg_ungating_time; g->pg_ungating_time_us += (u64)elpg_ungating_time;
g->pg_gating_cnt += gating_cnt; g->pg_gating_cnt += gating_cnt;
mutex_lock(&pmu->isr_enable_lock); mutex_lock(&pmu->isr_mutex);
pmu_enable(pmu, false); pmu_enable(pmu, false);
pmu->isr_enabled = false; pmu->isr_enabled = false;
mutex_unlock(&pmu->isr_enable_lock); mutex_unlock(&pmu->isr_mutex);
pmu->pmu_state = PMU_STATE_OFF; pmu->pmu_state = PMU_STATE_OFF;
pmu->pmu_ready = false; pmu->pmu_ready = false;

1
drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
View File

@@ -1082,7 +1082,6 @@ struct pmu_gk20a {
u32 load_shadow; u32 load_shadow;
struct mutex isr_mutex; struct mutex isr_mutex;
struct mutex isr_enable_lock;
bool isr_enabled; bool isr_enabled;
bool zbc_ready; bool zbc_ready;

4
drivers/gpu/nvgpu/gm20b/acr_gm20b.c
View File

@@ -1085,10 +1085,10 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, struct flcn_bl_dmem_desc *desc,
int err; int err;
gk20a_dbg_fn(""); gk20a_dbg_fn("");
mutex_lock(&pmu->isr_enable_lock); mutex_lock(&pmu->isr_mutex);
pmu_reset(pmu); pmu_reset(pmu);
pmu->isr_enabled = true; pmu->isr_enabled = true;
mutex_unlock(&pmu->isr_enable_lock); mutex_unlock(&pmu->isr_mutex);
/* setup apertures - virtual */ /* setup apertures - virtual */
gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE),