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gpu: nvgpu: move platform_gk20a.h to linux
Move gk20a/platform_gk20a.h to linux specific directory as common/linux/platform_gk20a.h since this file includes all linux specific stuff Fix #includes in all the files to include this file with correct path Remove #include of this file where it is no more needed Fix gk20a_init_sim_support() to receive struct gk20a as parameter instead of receiving linux specific struct platform_device NVGPU-316 Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589938 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Deepak Nibade
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302
drivers/gpu/nvgpu/common/linux/platform_gk20a.h
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302
drivers/gpu/nvgpu/common/linux/platform_gk20a.h
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/*
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* GK20A Platform (SoC) Interface
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _GK20A_PLATFORM_H_
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#define _GK20A_PLATFORM_H_
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#include <linux/device.h>
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#include <nvgpu/lock.h>
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#include "gk20a/gk20a.h"
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#define GK20A_CLKS_MAX 4
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struct gk20a;
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struct channel_gk20a;
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struct gr_ctx_buffer_desc;
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struct gk20a_scale_profile;
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struct secure_page_buffer {
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void (*destroy)(struct gk20a *, struct secure_page_buffer *);
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size_t size;
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u64 iova;
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};
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struct gk20a_platform {
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/* Populated by the gk20a driver before probing the platform. */
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struct gk20a *g;
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/* Should be populated at probe. */
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bool can_railgate_init;
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/* Should be populated at probe. */
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bool can_elpg_init;
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/* Should be populated at probe. */
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bool has_syncpoints;
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/* channel limit after which to start aggressive sync destroy */
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unsigned int aggressive_sync_destroy_thresh;
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/* flag to set sync destroy aggressiveness */
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bool aggressive_sync_destroy;
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/* set if ASPM should be disabled on boot; only makes sense for PCI */
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bool disable_aspm;
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/* Set if the platform can unify the small/large address spaces. */
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bool unify_address_spaces;
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/* Clock configuration is stored here. Platform probe is responsible
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* for filling this data. */
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struct clk *clk[GK20A_CLKS_MAX];
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int num_clks;
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#ifdef CONFIG_RESET_CONTROLLER
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/* Reset control for device */
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struct reset_control *reset_control;
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#endif
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/* Delay before rail gated */
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int railgate_delay_init;
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/* Second Level Clock Gating: true = enable false = disable */
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bool enable_slcg;
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/* Block Level Clock Gating: true = enable flase = disable */
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bool enable_blcg;
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/* Engine Level Clock Gating: true = enable flase = disable */
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bool enable_elcg;
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/* Should be populated at probe. */
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bool can_slcg;
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/* Should be populated at probe. */
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bool can_blcg;
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/* Should be populated at probe. */
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bool can_elcg;
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/* Engine Level Power Gating: true = enable flase = disable */
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bool enable_elpg;
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/* Adaptative ELPG: true = enable flase = disable */
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bool enable_aelpg;
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/* PMU Perfmon: true = enable false = disable */
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bool enable_perfmon;
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/* Memory System Clock Gating: true = enable flase = disable*/
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bool enable_mscg;
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/* Timeout for per-channel watchdog (in mS) */
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u32 ch_wdt_timeout_ms;
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/* Enable SMMU bypass by default */
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bool bypass_smmu;
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/* Disable big page support */
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bool disable_bigpage;
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/*
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* gk20a_do_idle() API can take GPU either into rail gate or CAR reset
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* This flag can be used to force CAR reset case instead of rail gate
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*/
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bool force_reset_in_do_idle;
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/* default pri timeout, on PCIe it should be lower than timeout
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* detection
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*/
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u32 default_pri_timeout;
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/* Initialize the platform interface of the gk20a driver.
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*
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* The platform implementation of this function must
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* - set the power and clocks of the gk20a device to a known
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* state, and
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* - populate the gk20a_platform structure (a pointer to the
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* structure can be obtained by calling gk20a_get_platform).
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*
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* After this function is finished, the driver will initialise
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* pm runtime and genpd based on the platform configuration.
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*/
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int (*probe)(struct device *dev);
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/* Second stage initialisation - called once all power management
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* initialisations are done.
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*/
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int (*late_probe)(struct device *dev);
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/* Remove device after power management has been done
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*/
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int (*remove)(struct device *dev);
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/* Poweron platform dependencies */
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int (*busy)(struct device *dev);
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/* Powerdown platform dependencies */
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void (*idle)(struct device *dev);
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struct secure_page_buffer secure_buffer;
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/* Device is going to be suspended */
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int (*suspend)(struct device *);
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/* Called to turn off the device */
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int (*railgate)(struct device *dev);
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/* Called to turn on the device */
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int (*unrailgate)(struct device *dev);
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struct nvgpu_mutex railgate_lock;
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/* Called to check state of device */
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bool (*is_railgated)(struct device *dev);
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/* get supported frequency list */
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int (*get_clk_freqs)(struct device *pdev,
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unsigned long **freqs, int *num_freqs);
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/* clk related supported functions */
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long (*clk_round_rate)(struct device *dev,
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unsigned long rate);
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/* Called to register GPCPLL with common clk framework */
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int (*clk_register)(struct gk20a *g);
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/* Postscale callback is called after frequency change */
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void (*postscale)(struct device *dev,
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unsigned long freq);
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/* Pre callback is called before frequency change */
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void (*prescale)(struct device *dev);
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/* Devfreq governor name. If scaling is enabled, we request
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* this governor to be used in scaling */
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const char *devfreq_governor;
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/* Quality of service notifier callback. If this is set, the scaling
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* routines will register a callback to Qos. Each time we receive
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* a new value, this callback gets called. */
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int (*qos_notify)(struct notifier_block *nb,
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unsigned long n, void *p);
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/* Called as part of debug dump. If the gpu gets hung, this function
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* is responsible for delivering all necessary debug data of other
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* hw units which may interact with the gpu without direct supervision
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* of the CPU.
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*/
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void (*dump_platform_dependencies)(struct device *dev);
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/* Callbacks to assert/deassert GPU reset */
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int (*reset_assert)(struct device *dev);
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int (*reset_deassert)(struct device *dev);
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struct clk *clk_reset;
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struct dvfs_rail *gpu_rail;
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bool virtual_dev;
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#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
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void *vgpu_priv;
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#endif
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/* source frequency for ptimer in hz */
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u32 ptimer_src_freq;
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bool has_cde;
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/* soc name for finding firmware files */
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const char *soc_name;
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/* false if vidmem aperture actually points to sysmem */
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bool honors_aperture;
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/* unified or split memory with separate vidmem? */
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bool unified_memory;
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/* true if all channels must be in TSG */
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bool tsg_required;
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/* minimum supported VBIOS version */
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u32 vbios_min_version;
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/* true if we run preos microcode on this board */
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bool run_preos;
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/* true if we need to program sw threshold for
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* power limits
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*/
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bool hardcode_sw_threshold;
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/* i2c device index, port and address for INA3221 */
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u32 ina3221_dcb_index;
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u32 ina3221_i2c_address;
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u32 ina3221_i2c_port;
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};
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static inline struct gk20a_platform *gk20a_get_platform(
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struct device *dev)
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{
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return (struct gk20a_platform *)dev_get_drvdata(dev);
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}
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#ifdef CONFIG_TEGRA_GK20A
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extern struct gk20a_platform gm20b_tegra_platform;
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extern struct gk20a_platform gp10b_tegra_platform;
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#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
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extern struct gk20a_platform vgpu_tegra_platform;
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#endif
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#endif
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int gk20a_tegra_busy(struct device *dev);
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void gk20a_tegra_idle(struct device *dev);
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void gk20a_tegra_debug_dump(struct device *pdev);
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static inline struct gk20a *get_gk20a(struct device *dev)
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{
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return gk20a_get_platform(dev)->g;
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}
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static inline struct gk20a *gk20a_from_dev(struct device *dev)
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{
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if (!dev)
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return NULL;
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return ((struct gk20a_platform *)dev_get_drvdata(dev))->g;
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}
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static inline bool gk20a_gpu_is_virtual(struct device *dev)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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return platform->virtual_dev;
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}
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static inline int support_gk20a_pmu(struct device *dev)
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{
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if (IS_ENABLED(CONFIG_GK20A_PMU)) {
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/* gPMU is not supported for vgpu */
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return !gk20a_gpu_is_virtual(dev);
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}
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return 0;
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}
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#endif
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