From 257115e06c9df7c491019d0898eb1e0b4ccd1f06 Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Wed, 20 Mar 2019 13:47:47 -0400 Subject: [PATCH] gpu: nvgpu: add nvgpu_bitmap_set and nvgpu_bitmap_clear Introduce nvgpu_bitmap_set() and nvgpu_bitmap_clear() APIs to wrap the bitmap_set() and bitmap_clear() APIs, respectively. The new nvgpu_* versions accept unsigned length parameters since length is logically an unsigned value where bitmap_set and bitmap_clear accept signed values. We inherit bitmap_set and bitmap_clear from the OS, so we can't directly change those. Also, change uses of the old APIs to the new ones. These changes resolve MISRA Rule 10.3 violations for implicit assignment of objects of different essential or narrower type. JIRA NVGPU-2953 Change-Id: I2c8f790049232a791f248b350c485bb07452315b Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2077624 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- .../common/mm/allocators/bitmap_allocator.c | 7 +++---- .../nvgpu/common/mm/allocators/page_allocator.c | 4 ++-- drivers/gpu/nvgpu/common/mm/comptags.c | 4 ++-- .../gpu/nvgpu/common/perf/cyclestats_snapshot.c | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/bitops.h | 17 ++++++++++++++++- userspace/units/fifo/runlist/nvgpu-runlist.c | 4 ++-- 6 files changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/nvgpu/common/mm/allocators/bitmap_allocator.c b/drivers/gpu/nvgpu/common/mm/allocators/bitmap_allocator.c index 660ce093c..4dc9ef73e 100644 --- a/drivers/gpu/nvgpu/common/mm/allocators/bitmap_allocator.c +++ b/drivers/gpu/nvgpu/common/mm/allocators/bitmap_allocator.c @@ -90,8 +90,8 @@ static u64 nvgpu_bitmap_alloc_fixed(struct nvgpu_allocator *na, goto fail; } - nvgpu_assert(blks <= (u32)INT_MAX); - bitmap_set(a->bitmap, (u32)offs, (int)blks); + nvgpu_assert(blks <= U32_MAX); + nvgpu_bitmap_set(a->bitmap, (u32)offs, U32(blks)); a->bytes_alloced += blks * a->blk_size; a->nr_fixed_allocs++; @@ -238,9 +238,8 @@ static u64 nvgpu_bitmap_alloc(struct nvgpu_allocator *na, u64 len) } } - nvgpu_assert(blks <= (u64)INT_MAX); nvgpu_assert(offs <= U32_MAX); - bitmap_set(a->bitmap, (u32)offs, (int)blks); + nvgpu_bitmap_set(a->bitmap, (u32)offs, blks); a->next_blk = offs + blks; adjusted_offs = offs + a->bit_offs; diff --git a/drivers/gpu/nvgpu/common/mm/allocators/page_allocator.c b/drivers/gpu/nvgpu/common/mm/allocators/page_allocator.c index 67c48566e..7fd67ca77 100644 --- a/drivers/gpu/nvgpu/common/mm/allocators/page_allocator.c +++ b/drivers/gpu/nvgpu/common/mm/allocators/page_allocator.c @@ -383,7 +383,7 @@ static int do_slab_alloc(struct nvgpu_page_allocator *a, } nvgpu_assert(offs <= U64(U32_MAX)); - bitmap_set(&slab_page->bitmap, U32(offs), 1); + nvgpu_bitmap_set(&slab_page->bitmap, U32(offs), 1U); slab_page->nr_objects_alloced++; if (slab_page->nr_objects_alloced < slab_page->nr_objects) { @@ -475,7 +475,7 @@ static void nvgpu_free_slab(struct nvgpu_page_allocator *a, u32 offs; offs = (u32)(alloc->base - slab_page->page_addr) / slab_page->slab_size; - bitmap_clear(&slab_page->bitmap, offs, 1); + nvgpu_bitmap_clear(&slab_page->bitmap, offs, 1U); slab_page->nr_objects_alloced--; diff --git a/drivers/gpu/nvgpu/common/mm/comptags.c b/drivers/gpu/nvgpu/common/mm/comptags.c index 8ba34aefb..e4bb6f31d 100644 --- a/drivers/gpu/nvgpu/common/mm/comptags.c +++ b/drivers/gpu/nvgpu/common/mm/comptags.c @@ -42,7 +42,7 @@ int gk20a_comptaglines_alloc(struct gk20a_comptag_allocator *allocator, /* number zero is reserved; bitmap base is 1 */ nvgpu_assert(addr < U64(U32_MAX)); *offset = 1U + U32(addr); - bitmap_set(allocator->bitmap, U32(addr), len); + nvgpu_bitmap_set(allocator->bitmap, U32(addr), len); } else { err = -ENOMEM; } @@ -66,7 +66,7 @@ void gk20a_comptaglines_free(struct gk20a_comptag_allocator *allocator, WARN_ON((unsigned long)addr + (unsigned long)len > allocator->size); nvgpu_mutex_acquire(&allocator->lock); - bitmap_clear(allocator->bitmap, addr, len); + nvgpu_bitmap_clear(allocator->bitmap, addr, len); nvgpu_mutex_release(&allocator->lock); } diff --git a/drivers/gpu/nvgpu/common/perf/cyclestats_snapshot.c b/drivers/gpu/nvgpu/common/perf/cyclestats_snapshot.c index a107dfff1..602a3f7eb 100644 --- a/drivers/gpu/nvgpu/common/perf/cyclestats_snapshot.c +++ b/drivers/gpu/nvgpu/common/perf/cyclestats_snapshot.c @@ -371,7 +371,7 @@ u32 nvgpu_css_allocate_perfmon_ids(struct gk20a_cs_snapshot *data, if (f > CSS_MAX_PERFMON_IDS) { f = 0; } else { - bitmap_set(pids, f, count); + nvgpu_bitmap_set(pids, f, count); } return f; @@ -386,7 +386,7 @@ u32 nvgpu_css_release_perfmon_ids(struct gk20a_cs_snapshot *data, u32 cnt = 0; if (start >= CSS_FIRST_PERFMON_ID && end <= CSS_MAX_PERFMON_IDS) { - bitmap_clear(pids, start, count); + nvgpu_bitmap_clear(pids, start, count); cnt = count; } diff --git a/drivers/gpu/nvgpu/include/nvgpu/bitops.h b/drivers/gpu/nvgpu/include/nvgpu/bitops.h index 9eaa6b64f..617adbc1f 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/bitops.h +++ b/drivers/gpu/nvgpu/include/nvgpu/bitops.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -23,6 +23,7 @@ #define NVGPU_BITOPS_H #include +#include /* * Explicit sizes for bit definitions. Please use these instead of BIT(). @@ -41,4 +42,18 @@ #include #endif +static inline void nvgpu_bitmap_set(unsigned long *map, unsigned int start, + unsigned int len) +{ + BUG_ON(len > U32(INT_MAX)); + bitmap_set(map, start, (int)len); +} + +static inline void nvgpu_bitmap_clear(unsigned long *map, unsigned int start, + unsigned int len) +{ + BUG_ON(len > U32(INT_MAX)); + bitmap_clear(map, start, (int)len); +} + #endif /* NVGPU_BITOPS_H */ diff --git a/userspace/units/fifo/runlist/nvgpu-runlist.c b/userspace/units/fifo/runlist/nvgpu-runlist.c index 8e22f488f..0f581ae0e 100644 --- a/userspace/units/fifo/runlist/nvgpu-runlist.c +++ b/userspace/units/fifo/runlist/nvgpu-runlist.c @@ -67,9 +67,9 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map, g->runlist_interleave = interleave; /* set bits in active_tsgs correspond to indices in f->tsg[...] */ - bitmap_set(runlist->active_tsgs, 0, num_tsgs); + nvgpu_bitmap_set(runlist->active_tsgs, 0, num_tsgs); /* same; these are only used if a high enough tsg appears */ - bitmap_set(runlist->active_channels, 0, num_channels); + nvgpu_bitmap_set(runlist->active_channels, 0, num_channels); }