gpu: nvgpu: fix MISRA violations in common.fifo

- Rule 8.6 requires each identifier with external linkage to have
exactly one external definitions.
- Define macro instead of constant value of maximum gpfifo entries.

Jira NVGPU-6262

Change-Id: If8f4b9fa06db62a03d487b9e3dd8157a40cffe16
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2540462
(cherry picked from commit 03a42b55b29dc3503999f4728589f0bd17b75c76)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2544846
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2021-06-06 21:49:20 -07:00
committed by mobile promotions
parent 3e43f92f21
commit 261bdb9cc2
2 changed files with 5 additions and 1 deletions

View File

@@ -69,6 +69,8 @@
#include "channel_wdt.h"
#include "channel_worker.h"
#define CHANNEL_MAX_GPFIFO_ENTRIES 0x80000000U
static void free_channel(struct nvgpu_fifo *f, struct nvgpu_channel *ch);
static void channel_dump_ref_actions(struct nvgpu_channel *ch);
@@ -1409,7 +1411,7 @@ static int channel_setup_bind_prechecks(struct nvgpu_channel *c,
struct nvgpu_tsg *tsg;
int err = 0;
if (args->num_gpfifo_entries > 0x80000000U) {
if (args->num_gpfifo_entries > CHANNEL_MAX_GPFIFO_ENTRIES) {
nvgpu_err(g,
"num_gpfifo_entries exceeds max limit of 2^31");
err = -EINVAL;

View File

@@ -831,6 +831,7 @@ int nvgpu_channel_suspend_all_serviceable_ch(struct gk20a *g);
*/
int nvgpu_channel_resume_all_serviceable_ch(struct gk20a *g);
#ifdef CONFIG_NVGPU_DETERMINISTIC_CHANNELS
/**
* @brief Stop deterministic channel activity for do_idle().
*
@@ -857,6 +858,7 @@ void nvgpu_channel_deterministic_idle(struct gk20a *g);
* @note Must be paired with #nvgpu_channel_deterministic_idle().
*/
void nvgpu_channel_deterministic_unidle(struct gk20a *g);
#endif
/**
* @brief Get a reference to the channel.