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gpu: nvgpu: Deal with invalid MMU id

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If gk20a_engine_id_to_mmu_id() fails, it returns ~0. Deal with this
by checking the results in each call to it.

Change-Id: I6fb9f7151f21a6c4694bfb2ea3c960d344fe629f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1249965
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2016-11-08 13:36:17 -08:00
committed by mobile promotions
parent c30f649c4f
commit 268e772e80
2 changed files with 19 additions and 13 deletions
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23
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -1557,15 +1557,18 @@ static void gk20a_fifo_trigger_mmu_fault(struct gk20a *g,
/* trigger faults for all bad engines */
for_each_set_bit(engine_id, &engine_ids, 32) {
u32 mmu_id;
if (!gk20a_fifo_is_valid_engine_id(g, engine_id)) {
WARN_ON(true);
break;
}
gk20a_writel(g, fifo_trigger_mmu_fault_r(engine_id),
fifo_trigger_mmu_fault_id_f(
gk20a_engine_id_to_mmu_id(g, engine_id)) |
fifo_trigger_mmu_fault_enable_f(1));
mmu_id = gk20a_engine_id_to_mmu_id(g, engine_id);
if (mmu_id != ~0)
gk20a_writel(g, fifo_trigger_mmu_fault_r(engine_id),
fifo_trigger_mmu_fault_id_f(mmu_id) |
fifo_trigger_mmu_fault_enable_f(1));
}
/* Wait for MMU fault to trigger */
@@ -1707,8 +1710,10 @@ void gk20a_fifo_recover(struct gk20a *g, u32 __engine_ids,
/* atleast one engine will get passed during sched err*/
engine_ids |= __engine_ids;
for_each_set_bit(engine_id, &engine_ids, 32) {
mmu_fault_engines |=
BIT(gk20a_engine_id_to_mmu_id(g, engine_id));
u32 mmu_id = gk20a_engine_id_to_mmu_id(g, engine_id);
if (mmu_id != ~0)
mmu_fault_engines |= BIT(mmu_id);
}
} else {
/* store faulted engines in advance */
@@ -1728,9 +1733,11 @@ void gk20a_fifo_recover(struct gk20a *g, u32 __engine_ids,
gk20a_fifo_get_faulty_id_type(g, active_engine_id, &id, &type);
if (ref_type == type && ref_id == id) {
u32 mmu_id = gk20a_engine_id_to_mmu_id(g, active_engine_id);
engine_ids |= BIT(active_engine_id);
mmu_fault_engines |=
BIT(gk20a_engine_id_to_mmu_id(g, active_engine_id));
if (mmu_id != ~0)
mmu_fault_engines |= BIT(mmu_id);
}
}
}

9
drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
View File

@@ -74,16 +74,15 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g,
/* trigger faults for all bad engines */
for_each_set_bit(engine_id, &engine_ids, 32) {
u32 engine_mmu_fault_id;
if (!gk20a_fifo_is_valid_engine_id(g, engine_id)) {
gk20a_err(dev_from_gk20a(g),
"faulting unknown engine %ld", engine_id);
} else {
engine_mmu_fault_id = gm20b_engine_id_to_mmu_id(g,
u32 mmu_id = gm20b_engine_id_to_mmu_id(g,
engine_id);
gk20a_writel(g, fifo_trigger_mmu_fault_r(engine_id),
fifo_trigger_mmu_fault_enable_f(1));
if (mmu_id != ~0)
gk20a_writel(g, fifo_trigger_mmu_fault_r(mmu_id),
fifo_trigger_mmu_fault_enable_f(1));
}
}