gpu: nvgpu: move nvgpu_gr_zcull to common

The nvgpu_gr_zcull struct need not be part of public zcull
header. Move it to a common.gr unit header and update gr/hal
users.

JIRA NVGPU-3060

Change-Id: I5c821f98ab304c5486b4a2630ac5827f1203dae7
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084806
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/gr/zcull.c

@@ -28,6 +28,8 @@
 #include <nvgpu/gr/zcull.h>
 #include <nvgpu/gr/config.h>
 
+#include "zcull_priv.h"
+
 int nvgpu_gr_zcull_init(struct gk20a *g, struct nvgpu_gr_zcull **gr_zcull)
 {
 	struct nvgpu_gr_config *gr_config = g->gr.config;

drivers/gpu/nvgpu/common/gr/zcull_priv.h

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_GR_ZCULL_PRIV_H
+#define NVGPU_GR_ZCULL_PRIV_H
+
+#include <nvgpu/types.h>
+
+struct gk20a;
+
+struct nvgpu_gr_zcull {
+	struct gk20a *g;
+
+	u32 aliquot_width;
+	u32 aliquot_height;
+	u32 aliquot_size;
+	u32 total_aliquots;
+
+	u32 width_align_pixels;
+	u32 height_align_pixels;
+	u32 pixel_squares_by_aliquots;
+
+	u32 zcull_ctxsw_image_size;
+};
+
+#endif /* NVGPU_GR_ZCULL_PRIV_H */

drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c

@@ -50,6 +50,7 @@
 #include "subctx_vgpu.h"
 
 #include "common/vgpu/perf/cyclestats_snapshot_vgpu.h"
+#include "common/gr/zcull_priv.h"
 
 void vgpu_gr_detect_sm_arch(struct gk20a *g)
 {

drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c

@@ -27,6 +27,8 @@
 #include <nvgpu/gr/ctx.h>
 #include <nvgpu/gr/zcull.h>
 
+#include "common/gr/zcull_priv.h"
+
 #include "zcull_gm20b.h"
 
 #include <nvgpu/hw/gm20b/hw_gr_gm20b.h>

drivers/gpu/nvgpu/include/nvgpu/gr/zcull.h

@@ -29,21 +29,7 @@ struct gk20a;
 struct nvgpu_gr_config;
 struct nvgpu_gr_ctx;
 struct nvgpu_gr_subctx;
-
-struct nvgpu_gr_zcull {
-	struct gk20a *g;
-
-	u32 aliquot_width;
-	u32 aliquot_height;
-	u32 aliquot_size;
-	u32 total_aliquots;
-
-	u32 width_align_pixels;
-	u32 height_align_pixels;
-	u32 pixel_squares_by_aliquots;
-
-	u32 zcull_ctxsw_image_size;
-};
+struct nvgpu_gr_zcull;
 
 struct nvgpu_gr_zcull_info {
 	u32 width_align_pixels;