gpu: nvgpu: change _suspend_clk_support to void

The HAL _suspend_clk_support was returning int but it
was always 0, so this patch changes it to void which
fixes a number of MISRA 17.7 violations.

JIRA NVGPU-677

Change-Id: Ia107da7ff043147ee00f2580390420914029daeb
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2004120
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/init/nvgpu_init.c

@@ -110,7 +110,7 @@ int gk20a_prepare_poweroff(struct gk20a *g)
 
 	/* Disable GPCPLL */
 	if (g->ops.clk.suspend_clk_support != NULL) {
-		ret |= g->ops.clk.suspend_clk_support(g);
+		g->ops.clk.suspend_clk_support(g);
 	}
 	gk20a_mask_interrupts(g);
 

drivers/gpu/nvgpu/gm20b/clk_gm20b.c

@@ -1493,10 +1493,8 @@ int gm20b_init_clk_support(struct gk20a *g)
 	return err;
 }
 
-int gm20b_suspend_clk_support(struct gk20a *g)
+void gm20b_suspend_clk_support(struct gk20a *g)
 {
-	int ret = 0;
-
 	g->ops.clk.disable_unprepare(&g->clk);
 
 	/* The prev call may not disable PLL if gbus is unbalanced - force it */
@@ -1508,8 +1506,6 @@ int gm20b_suspend_clk_support(struct gk20a *g)
 	nvgpu_mutex_release(&g->clk.clk_mutex);
 
 	nvgpu_mutex_destroy(&g->clk.clk_mutex);
-
-	return ret;
 }
 
 int gm20b_clk_get_voltage(struct clk_gk20a *clk, u64 *val)

drivers/gpu/nvgpu/gm20b/clk_gm20b.h

@@ -73,7 +73,7 @@ struct pll_parms *gm20b_get_gpc_pll_parms(void);
 
 int gm20b_clk_pll_reg_write(struct gk20a *g, u32 reg, u32 val);
 int gm20b_init_clk_support(struct gk20a *g);
-int gm20b_suspend_clk_support(struct gk20a *g);
+void gm20b_suspend_clk_support(struct gk20a *g);
 int gm20b_clk_get_voltage(struct clk_gk20a *clk, u64 *val);
 int gm20b_clk_get_gpcclk_clock_counter(struct clk_gk20a *clk, u64 *val);
 int gm20b_clk_get_pll_debug_data(struct gk20a *g,

drivers/gpu/nvgpu/gp106/clk_gp106.c

@@ -281,8 +281,7 @@ int gp106_clk_domain_get_f_points(
 	return status;
 }
 
-int gp106_suspend_clk_support(struct gk20a *g)
+void gp106_suspend_clk_support(struct gk20a *g)
 {
 	nvgpu_mutex_destroy(&g->clk.clk_mutex);
-	return 0;
 }

drivers/gpu/nvgpu/gp106/clk_gp106.h

@@ -29,7 +29,7 @@ u32 gp106_get_rate_cntr(struct gk20a *g, struct namemap_cfg *c);
 int gp106_init_clk_support(struct gk20a *g);
 u32 gp106_crystal_clk_hz(struct gk20a *g);
 unsigned long gp106_clk_measure_freq(struct gk20a *g, u32 api_domain);
-int gp106_suspend_clk_support(struct gk20a *g);
+void gp106_suspend_clk_support(struct gk20a *g);
 int gp106_clk_domain_get_f_points(
 	struct gk20a *g,
 	u32 clkapidomain,

drivers/gpu/nvgpu/gv100/clk_gv100.c

@@ -232,8 +232,7 @@ int gv100_clk_domain_get_f_points(
 	}
 	return status;
 }
-int gv100_suspend_clk_support(struct gk20a *g)
+void gv100_suspend_clk_support(struct gk20a *g)
 {
 	nvgpu_mutex_destroy(&g->clk.clk_mutex);
-	return 0;
 }

drivers/gpu/nvgpu/gv100/clk_gv100.h

@@ -29,7 +29,7 @@ u32 gv100_get_rate_cntr(struct gk20a *g, struct namemap_cfg *c);
 int gv100_init_clk_support(struct gk20a *g);
 u32 gv100_crystal_clk_hz(struct gk20a *g);
 unsigned long gv100_clk_measure_freq(struct gk20a *g, u32 api_domain);
-int gv100_suspend_clk_support(struct gk20a *g);
+void gv100_suspend_clk_support(struct gk20a *g);
 int gv100_clk_domain_get_f_points(
 	struct gk20a *g,
 	u32 clkapidomain,

drivers/gpu/nvgpu/include/nvgpu/gk20a.h

@@ -1232,7 +1232,7 @@ struct gpu_ops {
 		int (*init_debugfs)(struct gk20a *g);
 		void (*disable_slowboot)(struct gk20a *g);
 		int (*init_clk_support)(struct gk20a *g);
-		int (*suspend_clk_support)(struct gk20a *g);
+		void (*suspend_clk_support)(struct gk20a *g);
 		u32 (*get_crystal_clk_hz)(struct gk20a *g);
 		int (*clk_domain_get_f_points)(struct gk20a *g,
 			u32 clkapidomain, u32 *pfpointscount,