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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
nvgpu: reorder the check for same mask value
After the board boots up, we have a specific set of settings for
each power mode which contains, fbp, tpc mask values, cpu, gpu
frequencies etc. So, we need to make sure to provide all the setting
values for each mode so that those will be applied correctly.
So, the fbp, tpc, gpc mask could be same in different power modes
and since the golden image context check which comes before is
returning -ENODEV, the nvpmodel service fails to set the power mode.
Thus, we need to compare whether the fbp and gpc mask values are same
before we check for the golden image context.
Bug 3581634
Change-Id: I3fb1398d47cd37bf49ad70cf80b057d4b80dec04
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
(cherry picked from commit a27e202402)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2688116
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -887,6 +887,11 @@ static ssize_t gpc_pg_mask_store(struct device *dev,
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (val == g->gpc_pg_mask) {
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nvgpu_info(g, "no value change, same mask already set");
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goto exit;
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}
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if (g->gr != NULL) {
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if (g->gr != NULL) {
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gr_golden_image = nvgpu_gr_get_golden_image_ptr(g);
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gr_golden_image = nvgpu_gr_get_golden_image_ptr(g);
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}
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}
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@@ -899,11 +904,6 @@ static ssize_t gpc_pg_mask_store(struct device *dev,
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (val == g->gpc_pg_mask) {
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nvgpu_info(g, "no value change, same mask already set");
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goto exit;
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}
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if (platform->set_gpc_pg_mask != NULL) {
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if (platform->set_gpc_pg_mask != NULL) {
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err = platform->set_gpc_pg_mask(dev, val);
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err = platform->set_gpc_pg_mask(dev, val);
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if (err != 0) {
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if (err != 0) {
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@@ -967,6 +967,11 @@ static ssize_t fbp_pg_mask_store(struct device *dev,
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (val == g->fbp_pg_mask) {
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nvgpu_info(g, "no value change, same mask already set");
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goto exit;
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}
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if (g->gr != NULL) {
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if (g->gr != NULL) {
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gr_golden_image = nvgpu_gr_get_golden_image_ptr(g);
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gr_golden_image = nvgpu_gr_get_golden_image_ptr(g);
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}
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}
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@@ -979,11 +984,6 @@ static ssize_t fbp_pg_mask_store(struct device *dev,
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (val == g->fbp_pg_mask) {
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nvgpu_info(g, "no value change, same mask already set");
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goto exit;
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}
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if (platform->set_fbp_pg_mask != NULL) {
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if (platform->set_fbp_pg_mask != NULL) {
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err = platform->set_fbp_pg_mask(dev, val);
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err = platform->set_fbp_pg_mask(dev, val);
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if (err != 0) {
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if (err != 0) {
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