From 27122d10d7c9d1972a23dd3a06ba75de24805f07 Mon Sep 17 00:00:00 2001 From: dnibade Date: Fri, 27 Dec 2019 17:27:18 +0530 Subject: [PATCH] gpu: nvgpu: unit: add unit tests for fe idle and pwr_mode HALs Add unit test coverage for below HALs in common.gr.init subunit: - g->ops.gr.init.wait_fe_idle - g->ops.gr.init.fe_pwr_mode_force_on Jira NVGPU-4458 Change-Id: I924f9e49abcb5846f24c620bba7fd1c704c36932 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/2270652 Reviewed-by: mobile promotions Tested-by: mobile promotions --- userspace/required_tests.json | 12 +++ .../units/gr/init/nvgpu-gr-init-hal-gv11b.c | 77 +++++++++++++++++++ .../units/gr/init/nvgpu-gr-init-hal-gv11b.h | 64 ++++++++++++++- userspace/units/gr/init/nvgpu-gr-init.c | 2 + 4 files changed, 151 insertions(+), 4 deletions(-) diff --git a/userspace/required_tests.json b/userspace/required_tests.json index 4a13dce45..8e899c524 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -2519,6 +2519,18 @@ "unit": "nvgpu_gr_init", "test_level": 0 }, + { + "test": "test_gr_init_hal_wait_fe_idle", + "case": "gr_init_hal_wait_fe_idle", + "unit": "nvgpu_gr_init", + "test_level": 0 + }, + { + "test": "test_gr_init_hal_fe_pwr_mode", + "case": "gr_init_hal_fe_pwr_mode", + "unit": "nvgpu_gr_init", + "test_level": 0 + }, { "test": "test_gr_remove_setup", "case": "gr_remove_setup", diff --git a/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.c b/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.c index 09c64b8da..eee3a61b6 100644 --- a/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.c +++ b/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.c @@ -258,6 +258,83 @@ int test_gr_init_hal_wait_empty(struct unit_module *m, return UNIT_SUCCESS; } +int test_gr_init_hal_wait_fe_idle(struct unit_module *m, + struct gk20a *g, void *args) +{ + int err; + struct nvgpu_posix_fault_inj *timer_fi = + nvgpu_timers_get_fault_injection(); + + /* Fail timeout initialization */ + nvgpu_posix_enable_fault_injection(timer_fi, true, 0); + err = g->ops.gr.init.wait_fe_idle(g); + if (err != -ETIMEDOUT) { + return UNIT_FAIL; + } + + nvgpu_posix_enable_fault_injection(timer_fi, false, 0); + + /* Set FE status active */ + nvgpu_writel(g, gr_status_r(), BIT32(2U)); + + /* Should fail */ + err = g->ops.gr.init.wait_fe_idle(g); + if (err != -EAGAIN) { + return UNIT_FAIL; + } + + /* Success */ + nvgpu_writel(g, gr_status_r(), 0); + err = g->ops.gr.init.wait_fe_idle(g); + if (err != 0) { + return UNIT_FAIL; + } + + return UNIT_SUCCESS; +} + +int test_gr_init_hal_fe_pwr_mode(struct unit_module *m, + struct gk20a *g, void *args) +{ + int err; + struct nvgpu_posix_fault_inj *timer_fi = + nvgpu_timers_get_fault_injection(); + struct nvgpu_posix_fault_inj *readl_fi = + nvgpu_readl_get_fault_injection(); + + /* Fail timeout initialization */ + nvgpu_posix_enable_fault_injection(timer_fi, true, 0); + err = g->ops.gr.init.fe_pwr_mode_force_on(g, true); + if (err != -ETIMEDOUT) { + return UNIT_FAIL; + } + + nvgpu_posix_enable_fault_injection(timer_fi, false, 0); + + /* Trigger timeout by default */ + err = g->ops.gr.init.fe_pwr_mode_force_on(g, true); + if (err != -ETIMEDOUT) { + return UNIT_FAIL; + } + + /* Inject readl error so that timeout is not hit */ + nvgpu_posix_enable_fault_injection(readl_fi, true, 0); + err = g->ops.gr.init.fe_pwr_mode_force_on(g, true); + if (err != 0) { + return UNIT_FAIL; + } + + /* Call with flag set to false, should pass */ + err = g->ops.gr.init.fe_pwr_mode_force_on(g, false); + if (err != 0) { + return UNIT_FAIL; + } + + nvgpu_posix_enable_fault_injection(readl_fi, false, 0); + + return UNIT_SUCCESS; +} + static u32 gr_get_max_u32(struct gk20a *g) { return 0xFFFFFFFF; diff --git a/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.h b/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.h index b0b94a828..0e3bb88ca 100644 --- a/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.h +++ b/userspace/units/gr/init/nvgpu-gr-init-hal-gv11b.h @@ -38,7 +38,7 @@ struct unit_module; * * Description: Verify error handling in g->ops.gr.init.wait_empty. * - * Test Type: Feature, Error guessing. + * Test Type: Feature, Error guessing * * Targets: g->ops.gr.init.wait_empty. * @@ -58,12 +58,68 @@ struct unit_module; int test_gr_init_hal_wait_empty(struct unit_module *m, struct gk20a *g, void *args); +/** + * Test specification for: test_gr_init_hal_wait_fe_idle. + * + * Description: Verify error handling in g->ops.gr.init.wait_fe_idle. + * + * Test Type: Feature, Error guessing + * + * Targets: g->ops.gr.init.wait_fe_idle. + * + * Input: gr_init_setup, gr_init_prepare, gr_init_support must have + * been executed successfully. + * + * Steps: + * - Inject timeout error and call g->ops.gr.init.wait_fe_idle. + * Should fail since timeout initialization fails. + * - Set FE active status in register gr_status_r(), and call + * g->ops.gr.init.wait_fe_idle. Should fail since FE fails to idle. + * - Set FE idle status in register gr_status_r(), and call + * g->ops.gr.init.wait_fe_idle. Should pass this time. + * + * Output: Returns PASS if the steps above were executed successfully. FAIL + * otherwise. + */ +int test_gr_init_hal_wait_fe_idle(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * Test specification for: test_gr_init_hal_fe_pwr_mode. + * + * Description: Verify error handling in g->ops.gr.init.fe_pwr_mode_force_on. + * + * Test Type: Feature, Error guessing + * + * Targets: g->ops.gr.init.fe_pwr_mode_force_on. + * + * Input: gr_init_setup, gr_init_prepare, gr_init_support must have + * been executed successfully. + * + * Steps: + * - Inject timeout error and call g->ops.gr.init.fe_pwr_mode_force_on. + * should fail since timeout initialization fails. + * - Disable timeout error injection. + * - Call g->ops.gr.init.fe_pwr_mode_force_on. By default this should + * timeout and return error. + * - Enable readl function error injection and call + * g->ops.gr.init.fe_pwr_mode_force_on. Now this should return success. + * - Also call g->ops.gr.init.fe_pwr_mode_force_on with force flag set to + * false. Should return success. + * - Disable readl function error injection. + * + * Output: Returns pass if the steps above were executed successfully. fail + * otherwise. + */ +int test_gr_init_hal_fe_pwr_mode(struct unit_module *m, + struct gk20a *g, void *args); + /** * Test specification for: test_gr_init_hal_ecc_scrub_reg. * * Description: Verify error handling in gops.gr.init.ecc_scrub_reg function. * - * Test Type: Feature, Error guessing. + * Test Type: Feature, Error guessing * * Targets: g->ops.gr.init.ecc_scrub_reg. * @@ -94,7 +150,7 @@ int test_gr_init_hal_ecc_scrub_reg(struct unit_module *m, * Description: Verify error handling in gr.init HAL functions that * require tweaks to gr engine configuration. * - * Test Type: Feature, Error guessing. + * Test Type: Feature, Error guessing * * Targets: g->ops.gr.init.get_nonpes_aware_tpc, * g->ops.gr.init.sm_id_config, @@ -144,7 +200,7 @@ int test_gr_init_hal_config_error_injection(struct unit_module *m, * * Description: Code coverage test for g->ops.gr.init.commit_global_pagepool. * - * Test Type: Feature, Error guessing. + * Test Type: Feature, Error guessing * * Targets: g->ops.gr.init.commit_global_pagepool. * diff --git a/userspace/units/gr/init/nvgpu-gr-init.c b/userspace/units/gr/init/nvgpu-gr-init.c index 59ef5d20b..33d186237 100644 --- a/userspace/units/gr/init/nvgpu-gr-init.c +++ b/userspace/units/gr/init/nvgpu-gr-init.c @@ -185,6 +185,8 @@ struct unit_module_test nvgpu_gr_init_tests[] = { UNIT_TEST(gr_init_support, test_gr_init_support, NULL, 0), UNIT_TEST(gr_init_hal_error_injection, test_gr_init_hal_error_injection, NULL, 0), UNIT_TEST(gr_init_hal_wait_empty, test_gr_init_hal_wait_empty, NULL, 0), + UNIT_TEST(gr_init_hal_wait_fe_idle, test_gr_init_hal_wait_fe_idle, NULL, 0), + UNIT_TEST(gr_init_hal_fe_pwr_mode, test_gr_init_hal_fe_pwr_mode, NULL, 0), UNIT_TEST(gr_init_hal_ecc_scrub_reg, test_gr_init_hal_ecc_scrub_reg, NULL, 0), UNIT_TEST(gr_init_hal_config_error_injection, test_gr_init_hal_config_error_injection, NULL, 0), UNIT_TEST(gr_suspend, test_gr_suspend, NULL, 0),