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gpu: nvgpu: unit: Fix long standing MM bug

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Not sure if there's an actual bug or JIRA filed for this, but the
change here fixes a long standing bug in the MM code for unit tests.
Te GMMU programming code verifies that the CPU _physical_ address
programmed into the GMMU PDE0 is a valid Tegra SoC CPU physical
address. That means that it's not too large a value.

The POSIX imlementation of the nvgpu_mem related code used the CPU
virtual address as the "phys" address. Obviously, in userspace,
there's no access to physical addresses, so in some sense it's a
meaningless function. But the GMMU code does care, as described
above, about the format of the address.

The fix is simple enough: since the nvgpu_mem_get_addr() and
nvgpu_mem_get_phys_addr() values shouldn't actually be accessed by
the driver anyway (they could be vidmem addresses or IOVA addresses
in real life) ANDing them with 0xffffffff (e.g 32 bits) truncates
the potentially problematic CPU virtual address bits returned by
malloc() in the POSIX environment.

With this, a run of the unit test framework passes for me locally
on my Ubuntu 18 machine.

Also, clean up a few whitespace issues I noticed while I debugged
this and fix another long standing bug where the
NVGPU_DEFAULT_DBG_MASK was not being copied to g->log_mask during
gk20a struct init.

Change-Id: Ie92d3bd26240d194183b4376973d4d32cb6f9b8f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2395953
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Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
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GVS: Gerrit_Virtual_Submit
This commit is contained in:
Alex Waterman
2020-08-07 14:46:51 -05:00
parent 71b005c1ef
commit 27cd70afd8
7 changed files with 58 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
userspace/units/bus/nvgpu-bus.c
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@@ -208,7 +208,7 @@ done:
int test_bar_bind(struct unit_module *m, struct gk20a *g, void *args)
{
int ret = UNIT_FAIL;
struct nvgpu_mem bar_inst;
struct nvgpu_mem bar_inst = {0};
struct nvgpu_posix_fault_inj *timer_fi =
nvgpu_timers_get_fault_injection();

2
userspace/units/fb/fb_gm20b_fusa.c
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@@ -42,7 +42,7 @@ int fb_gm20b_tlb_invalidate_test(struct unit_module *m, struct gk20a *g,
void *args)
{
int err;
struct nvgpu_mem pdb;
struct nvgpu_mem pdb = {0};
struct nvgpu_posix_fault_inj *timer_fi =
nvgpu_timers_get_fault_injection();

1
userspace/units/mm/mm/mm.c
View File

@@ -637,6 +637,7 @@ int test_mm_inst_block(struct unit_module *m, struct gk20a *g,
struct nvgpu_mem *block = malloc(sizeof(struct nvgpu_mem));
int ret = UNIT_FAIL;
memset(block, 0, sizeof(*block));
block->aperture = APERTURE_SYSMEM;
block->cpu_va = (void *) TEST_ADDRESS;

2
userspace/units/mm/vm/vm.c
View File

@@ -48,7 +48,7 @@
#include <nvgpu/posix/posix-fault-injection.h>
/* Random CPU physical address for the buffers we'll map */
#define BUF_CPU_PA 0xEFAD80000000ULL
#define BUF_CPU_PA 0xEFAD0000ULL
#define TEST_BATCH_NUM_BUFFERS 10
#define PHYS_ADDR_BITS_HIGH 0x00FFFFFFU
#define PHYS_ADDR_BITS_LOW 0xFFFFFF00U