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gpu: nvgpu: Use TPC_PG_MASK to powergate the TPC

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- In GV11B, read fuse_status_opt_tpc_gpc register
  to read which TPCs are floorswept.
- The driver will also read sysfs node: tpc_pg_mask
- Based on these two values "can_tpc_powergate" will
  be set to true or false and mask will be used to write to
  fuse_ctrl_opt_tpc_gpc register to powergate the TPC.
- can_tpc_powergate = true indicates that the mask value
  sent from userspace is valid and can be used to power gate
  the desired TPC
- can_tpc_powergate = false indicates that the mask value
  sent from userspace is not valid and cannot  be used to
  power gate the desired TPC.

Bug 200532639

Change-Id: Ib0806e4c96305a13b3574e8063ad8e16770aa7cd
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2170736
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-08-08 09:54:19 +05:30
committed by mobile promotions
parent 488e44fce1
commit 2916a2067d
14 changed files with 170 additions and 25 deletions
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4
drivers/gpu/nvgpu/os/linux/platform_gk20a.h
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@@ -218,8 +218,8 @@ struct gk20a_platform {
/* Pre callback is called before frequency change */
void (*prescale)(struct device *dev);
/* Set TPC_PG during probe */
void (*set_tpc_pg_mask)(struct device *dev, u32 tpc_mask);
/* Set TPC_PG_MASK during probe */
void (*set_tpc_pg_mask)(struct device *dev, u32 tpc_pg_mask);
/* Devfreq governor name. If scaling is enabled, we request
* this governor to be used in scaling */