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gpu: nvgpu: move force_reset_ch to hal.tsg unit

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force_reset_ch obtains a tsg from a channel first before proceeding
with other work. Thus, force_reset_ch is moved as part of tsg unit to
avoid circular dependency between channel and tsg. TSGs can depend on
channels but channel cannot depend on TSGs.

Jira NVGPU-2978

Change-Id: Ib1879681287971d2a4dbeb26ca852d6b59b50f6a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084927
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2019-03-29 17:03:19 +05:30
committed by mobile promotions
parent eaab8ad1f2
commit 29b656f9b2
16 changed files with 34 additions and 46 deletions
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30
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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@@ -634,36 +634,6 @@ void gk20a_fifo_recover(struct gk20a *g, u32 engine_ids,
rc_type, NULL);
}
/* force reset channel and tsg */
int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch,
u32 err_code, bool verbose)
{
struct channel_gk20a *ch_tsg = NULL;
struct gk20a *g = ch->g;
struct tsg_gk20a *tsg = tsg_gk20a_from_ch(ch);
if (tsg != NULL) {
nvgpu_rwsem_down_read(&tsg->ch_list_lock);
nvgpu_list_for_each_entry(ch_tsg, &tsg->ch_list,
channel_gk20a, ch_entry) {
if (gk20a_channel_get(ch_tsg) != NULL) {
g->ops.channel.set_error_notifier(ch_tsg,
err_code);
gk20a_channel_put(ch_tsg);
}
}
nvgpu_rwsem_up_read(&tsg->ch_list_lock);
nvgpu_tsg_recover(g, tsg, verbose, RC_TYPE_FORCE_RESET);
} else {
nvgpu_err(g, "chid: %d is not bound to tsg", ch->chid);
}
return 0;
}
int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch)
{
struct gk20a *g = ch->g;