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gpu: nvgpu: refectored sim_readl/sim_writel
refactored sim_readl and sim_writel to use os-agnostic structures. converted all sim buffers to the type nvgpu_mem and replaced all alloc_page and free_page calls with corresponding nvgpu_dma_alloc/nvgpu_dma_free calls. JIRA VQRM-2368 Change-Id: Ia9d29119d31f239ed16be932cfd16c334002c727 Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1702050 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Sourab Gupta <sourabg@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@@ -20,47 +20,67 @@
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#include <nvgpu/log.h>
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#include <nvgpu/log.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/linux/vm.h>
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#include <nvgpu/bitops.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/dma.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/gk20a.h"
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#include "sim.h"
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#include "sim.h"
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#include <nvgpu/hw/gk20a/hw_sim_gk20a.h>
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#include <nvgpu/hw/gk20a/hw_sim_gk20a.h>
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static inline void sim_writel(struct sim_gk20a_linux *sim_linux, u32 r, u32 v)
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static inline void sim_writel(struct sim_gk20a *sim, u32 r, u32 v)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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container_of(sim, struct sim_gk20a_linux, sim);
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writel(v, sim_linux->regs + r);
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writel(v, sim_linux->regs + r);
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}
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}
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static inline u32 sim_readl(struct sim_gk20a_linux *sim_linux, u32 r)
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static inline u32 sim_readl(struct sim_gk20a *sim, u32 r)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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container_of(sim, struct sim_gk20a_linux, sim);
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return readl(sim_linux->regs + r);
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return readl(sim_linux->regs + r);
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}
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}
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static void kunmap_and_free_iopage(void **kvaddr, struct page **page)
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static int gk20a_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
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{
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{
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if (*kvaddr) {
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int err;
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kunmap(*kvaddr);
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*kvaddr = NULL;
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err = nvgpu_dma_alloc(g, PAGE_SIZE, mem);
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if (err)
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return err;
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/*
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* create a valid cpu_va mapping
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*/
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nvgpu_mem_begin(g, mem);
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return 0;
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}
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}
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if (*page) {
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__free_page(*page);
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static void gk20a_free_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
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*page = NULL;
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{
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if (nvgpu_mem_is_valid(mem)) {
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/*
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* invalidate the cpu_va mapping
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*/
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nvgpu_mem_end(g, mem);
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nvgpu_dma_free(g, mem);
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}
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}
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memset(mem, 0, sizeof(*mem));
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}
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}
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static void gk20a_free_sim_support(struct gk20a *g)
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static void gk20a_free_sim_support(struct gk20a *g)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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struct sim_gk20a_linux *sim_linux =
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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/* free sim mappings, bfrs */
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kunmap_and_free_iopage(&sim_linux->send_bfr.kvaddr,
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&sim_linux->send_bfr.page);
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kunmap_and_free_iopage(&sim_linux->recv_bfr.kvaddr,
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gk20a_free_sim_buffer(g, &sim_linux->send_bfr);
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&sim_linux->recv_bfr.page);
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gk20a_free_sim_buffer(g, &sim_linux->recv_bfr);
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gk20a_free_sim_buffer(g, &sim_linux->msg_bfr);
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kunmap_and_free_iopage(&sim_linux->msg_bfr.kvaddr,
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&sim_linux->msg_bfr.page);
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}
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}
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static void gk20a_remove_sim_support(struct sim_gk20a *s)
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static void gk20a_remove_sim_support(struct sim_gk20a *s)
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@@ -70,7 +90,7 @@ static void gk20a_remove_sim_support(struct sim_gk20a *s)
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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if (sim_linux->regs)
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if (sim_linux->regs)
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sim_writel(sim_linux, sim_config_r(), sim_config_mode_disabled_v());
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sim_writel(s, sim_config_r(), sim_config_mode_disabled_v());
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gk20a_free_sim_support(g);
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gk20a_free_sim_support(g);
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if (sim_linux->regs) {
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if (sim_linux->regs) {
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@@ -82,35 +102,6 @@ static void gk20a_remove_sim_support(struct sim_gk20a *s)
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g->sim = NULL;
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g->sim = NULL;
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}
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}
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static int alloc_and_kmap_iopage(struct gk20a *g,
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void **kvaddr,
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u64 *phys,
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struct page **page)
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{
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int err = 0;
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*page = alloc_page(GFP_KERNEL);
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if (!*page) {
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err = -ENOMEM;
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nvgpu_err(g, "couldn't allocate io page");
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goto fail;
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}
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*kvaddr = kmap(*page);
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if (!*kvaddr) {
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err = -ENOMEM;
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nvgpu_err(g, "couldn't kmap io page");
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goto fail;
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}
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*phys = page_to_phys(*page);
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return 0;
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fail:
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kunmap_and_free_iopage(kvaddr, page);
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return err;
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}
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static inline u32 sim_msg_header_size(void)
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static inline u32 sim_msg_header_size(void)
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{
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{
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return 24;/*TBD: fix the header to gt this from NV_VGPU_MSG_HEADER*/
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return 24;/*TBD: fix the header to gt this from NV_VGPU_MSG_HEADER*/
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@@ -120,7 +111,11 @@ static inline u32 *sim_msg_bfr(struct gk20a *g, u32 byte_offset)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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struct sim_gk20a_linux *sim_linux =
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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return (u32 *)(sim_linux->msg_bfr.kvaddr + byte_offset);
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u8 *cpu_va;
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cpu_va = (u8 *)sim_linux->msg_bfr.cpu_va;
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return (u32 *)(cpu_va + byte_offset);
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}
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}
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static inline u32 *sim_msg_hdr(struct gk20a *g, u32 byte_offset)
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static inline u32 *sim_msg_hdr(struct gk20a *g, u32 byte_offset)
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@@ -153,7 +148,11 @@ static u32 *sim_send_ring_bfr(struct gk20a *g, u32 byte_offset)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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struct sim_gk20a_linux *sim_linux =
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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return (u32 *)(sim_linux->send_bfr.kvaddr + byte_offset);
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u8 *cpu_va;
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cpu_va = (u8 *)sim_linux->send_bfr.cpu_va;
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return (u32 *)(cpu_va + byte_offset);
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}
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}
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static int rpc_send_message(struct gk20a *g)
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static int rpc_send_message(struct gk20a *g)
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@@ -169,18 +168,17 @@ static int rpc_send_message(struct gk20a *g)
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sim_dma_target_phys_pci_coherent_f() |
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sim_dma_target_phys_pci_coherent_f() |
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sim_dma_status_valid_f() |
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sim_dma_status_valid_f() |
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sim_dma_size_4kb_f() |
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sim_dma_size_4kb_f() |
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sim_dma_addr_lo_f(sim_linux->msg_bfr.phys >> PAGE_SHIFT);
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sim_dma_addr_lo_f(nvgpu_mem_get_addr(g, &sim_linux->msg_bfr) >> PAGE_SHIFT);
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*sim_send_ring_bfr(g, dma_hi_offset*sizeof(u32)) =
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*sim_send_ring_bfr(g, dma_hi_offset*sizeof(u32)) =
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u64_hi32(sim_linux->msg_bfr.phys);
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u64_hi32(nvgpu_mem_get_addr(g, &sim_linux->msg_bfr));
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*sim_msg_hdr(g, sim_msg_sequence_r()) = g->sim->sequence_base++;
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*sim_msg_hdr(g, sim_msg_sequence_r()) = g->sim->sequence_base++;
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g->sim->send_ring_put = (g->sim->send_ring_put + 2 * sizeof(u32)) %
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g->sim->send_ring_put = (g->sim->send_ring_put + 2 * sizeof(u32)) % PAGE_SIZE;
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PAGE_SIZE;
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/* Update the put pointer. This will trap into the host. */
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/* Update the put pointer. This will trap into the host. */
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sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
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sim_writel(g->sim, sim_send_put_r(), g->sim->send_ring_put);
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return 0;
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return 0;
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}
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}
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@@ -189,7 +187,11 @@ static inline u32 *sim_recv_ring_bfr(struct gk20a *g, u32 byte_offset)
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{
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{
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struct sim_gk20a_linux *sim_linux =
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struct sim_gk20a_linux *sim_linux =
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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return (u32 *)(sim_linux->recv_bfr.kvaddr + byte_offset);
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u8 *cpu_va;
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cpu_va = (u8 *)sim_linux->recv_bfr.cpu_va;
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return (u32 *)(cpu_va + byte_offset);
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}
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}
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static int rpc_recv_poll(struct gk20a *g)
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static int rpc_recv_poll(struct gk20a *g)
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@@ -203,7 +205,7 @@ static int rpc_recv_poll(struct gk20a *g)
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/* Poll the recv ring get pointer in an infinite loop*/
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/* Poll the recv ring get pointer in an infinite loop*/
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do {
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do {
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g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
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g->sim->recv_ring_put = sim_readl(g->sim, sim_recv_put_r());
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} while (g->sim->recv_ring_put == g->sim->recv_ring_get);
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} while (g->sim->recv_ring_put == g->sim->recv_ring_get);
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/* process all replies */
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/* process all replies */
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@@ -220,19 +222,19 @@ static int rpc_recv_poll(struct gk20a *g)
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recv_phys_addr = (u64)recv_phys_addr_hi << 32 |
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recv_phys_addr = (u64)recv_phys_addr_hi << 32 |
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(u64)recv_phys_addr_lo << PAGE_SHIFT;
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(u64)recv_phys_addr_lo << PAGE_SHIFT;
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if (recv_phys_addr != sim_linux->msg_bfr.phys) {
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if (recv_phys_addr !=
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nvgpu_mem_get_addr(g, &sim_linux->msg_bfr)) {
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nvgpu_err(g, "%s Error in RPC reply",
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nvgpu_err(g, "%s Error in RPC reply",
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__func__);
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__func__);
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return -1;
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return -1;
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}
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}
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/* Update GET pointer */
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/* Update GET pointer */
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g->sim->recv_ring_get = (g->sim->recv_ring_get + 2*sizeof(u32)) %
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g->sim->recv_ring_get = (g->sim->recv_ring_get + 2*sizeof(u32)) % PAGE_SIZE;
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PAGE_SIZE;
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sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
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sim_writel(g->sim, sim_recv_get_r(), g->sim->recv_ring_get);
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g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
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g->sim->recv_ring_put = sim_readl(g->sim, sim_recv_put_r());
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}
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}
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return 0;
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return 0;
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@@ -295,53 +297,41 @@ int gk20a_init_sim_support(struct gk20a *g)
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container_of(g->sim, struct sim_gk20a_linux, sim);
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container_of(g->sim, struct sim_gk20a_linux, sim);
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/* allocate sim event/msg buffers */
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/* allocate sim event/msg buffers */
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err = alloc_and_kmap_iopage(g, &sim_linux->send_bfr.kvaddr,
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err = gk20a_alloc_sim_buffer(g, &sim_linux->send_bfr);
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&sim_linux->send_bfr.phys,
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err = err || gk20a_alloc_sim_buffer(g, &sim_linux->recv_bfr);
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&sim_linux->send_bfr.page);
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err = err || gk20a_alloc_sim_buffer(g, &sim_linux->msg_bfr);
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err = err || alloc_and_kmap_iopage(g, &sim_linux->recv_bfr.kvaddr,
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if (err)
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&sim_linux->recv_bfr.phys,
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&sim_linux->recv_bfr.page);
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err = err || alloc_and_kmap_iopage(g, &sim_linux->msg_bfr.kvaddr,
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&sim_linux->msg_bfr.phys,
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&sim_linux->msg_bfr.page);
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if (!(sim_linux->send_bfr.kvaddr && sim_linux->recv_bfr.kvaddr &&
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sim_linux->msg_bfr.kvaddr)) {
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nvgpu_err(g, "couldn't allocate all sim buffers");
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goto fail;
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goto fail;
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}
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/*mark send ring invalid*/
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/*mark send ring invalid*/
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sim_writel(sim_linux, sim_send_ring_r(), sim_send_ring_status_invalid_f());
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sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f());
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/*read get pointer and make equal to put*/
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/*read get pointer and make equal to put*/
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g->sim->send_ring_put = sim_readl(sim_linux, sim_send_get_r());
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g->sim->send_ring_put = sim_readl(g->sim, sim_send_get_r());
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sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
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sim_writel(g->sim, sim_send_put_r(), g->sim->send_ring_put);
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/*write send ring address and make it valid*/
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/*write send ring address and make it valid*/
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phys = sim_linux->send_bfr.phys;
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phys = nvgpu_mem_get_addr(g, &sim_linux->send_bfr);
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sim_writel(sim_linux, sim_send_ring_hi_r(),
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sim_writel(g->sim, sim_send_ring_hi_r(),
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sim_send_ring_hi_addr_f(u64_hi32(phys)));
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sim_send_ring_hi_addr_f(u64_hi32(phys)));
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sim_writel(sim_linux, sim_send_ring_r(),
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sim_writel(g->sim, sim_send_ring_r(),
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sim_send_ring_status_valid_f() |
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sim_send_ring_status_valid_f() |
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sim_send_ring_target_phys_pci_coherent_f() |
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sim_send_ring_target_phys_pci_coherent_f() |
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sim_send_ring_size_4kb_f() |
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sim_send_ring_size_4kb_f() |
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sim_send_ring_addr_lo_f(phys >> PAGE_SHIFT));
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sim_send_ring_addr_lo_f(phys >> PAGE_SHIFT));
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/*repeat for recv ring (but swap put,get as roles are opposite) */
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/*repeat for recv ring (but swap put,get as roles are opposite) */
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sim_writel(sim_linux, sim_recv_ring_r(), sim_recv_ring_status_invalid_f());
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sim_writel(g->sim, sim_recv_ring_r(), sim_recv_ring_status_invalid_f());
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/*read put pointer and make equal to get*/
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/*read put pointer and make equal to get*/
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g->sim->recv_ring_get = sim_readl(sim_linux, sim_recv_put_r());
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g->sim->recv_ring_get = sim_readl(g->sim, sim_recv_put_r());
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sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
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sim_writel(g->sim, sim_recv_get_r(), g->sim->recv_ring_get);
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/*write send ring address and make it valid*/
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/*write send ring address and make it valid*/
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phys = sim_linux->recv_bfr.phys;
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phys = nvgpu_mem_get_addr(g, &sim_linux->recv_bfr);
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sim_writel(sim_linux, sim_recv_ring_hi_r(),
|
sim_writel(g->sim, sim_recv_ring_hi_r(),
|
||||||
sim_recv_ring_hi_addr_f(u64_hi32(phys)));
|
sim_recv_ring_hi_addr_f(u64_hi32(phys)));
|
||||||
sim_writel(sim_linux, sim_recv_ring_r(),
|
sim_writel(g->sim, sim_recv_ring_r(),
|
||||||
sim_recv_ring_status_valid_f() |
|
sim_recv_ring_status_valid_f() |
|
||||||
sim_recv_ring_target_phys_pci_coherent_f() |
|
sim_recv_ring_target_phys_pci_coherent_f() |
|
||||||
sim_recv_ring_size_4kb_f() |
|
sim_recv_ring_size_4kb_f() |
|
||||||
|
|||||||
@@ -2,7 +2,7 @@
|
|||||||
*
|
*
|
||||||
* GK20A sim support
|
* GK20A sim support
|
||||||
*
|
*
|
||||||
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
|
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
|
||||||
*
|
*
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
* under the terms and conditions of the GNU General Public License,
|
* under the terms and conditions of the GNU General Public License,
|
||||||
@@ -20,17 +20,16 @@
|
|||||||
#ifndef __SIM_LINUX_H__
|
#ifndef __SIM_LINUX_H__
|
||||||
#define __SIM_LINUX_H__
|
#define __SIM_LINUX_H__
|
||||||
|
|
||||||
|
#include <nvgpu/nvgpu_mem.h>
|
||||||
#include "gk20a/sim_gk20a.h"
|
#include "gk20a/sim_gk20a.h"
|
||||||
|
|
||||||
struct sim_gk20a_linux {
|
struct sim_gk20a_linux {
|
||||||
struct sim_gk20a sim;
|
struct sim_gk20a sim;
|
||||||
struct resource *reg_mem;
|
struct resource *reg_mem;
|
||||||
void __iomem *regs;
|
void __iomem *regs;
|
||||||
struct {
|
struct nvgpu_mem send_bfr;
|
||||||
struct page *page;
|
struct nvgpu_mem recv_bfr;
|
||||||
void *kvaddr;
|
struct nvgpu_mem msg_bfr;
|
||||||
u64 phys;
|
|
||||||
} send_bfr, recv_bfr, msg_bfr;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
int gk20a_init_sim_support(struct gk20a *g);
|
int gk20a_init_sim_support(struct gk20a *g);
|
||||||
|
|||||||
@@ -20,47 +20,67 @@
|
|||||||
|
|
||||||
#include <nvgpu/log.h>
|
#include <nvgpu/log.h>
|
||||||
#include <nvgpu/linux/vm.h>
|
#include <nvgpu/linux/vm.h>
|
||||||
|
#include <nvgpu/bitops.h>
|
||||||
|
#include <nvgpu/nvgpu_mem.h>
|
||||||
|
#include <nvgpu/dma.h>
|
||||||
#include "gk20a/gk20a.h"
|
#include "gk20a/gk20a.h"
|
||||||
#include "os_linux.h"
|
#include "os_linux.h"
|
||||||
#include "sim.h"
|
#include "sim.h"
|
||||||
#include "hw_sim_pci.h"
|
#include "hw_sim_pci.h"
|
||||||
|
|
||||||
static inline void sim_writel(struct sim_gk20a_linux *sim_linux, u32 r, u32 v)
|
static inline void sim_writel(struct sim_gk20a *sim, u32 r, u32 v)
|
||||||
{
|
{
|
||||||
|
struct sim_gk20a_linux *sim_linux =
|
||||||
|
container_of(sim, struct sim_gk20a_linux, sim);
|
||||||
|
|
||||||
writel(v, sim_linux->regs + r);
|
writel(v, sim_linux->regs + r);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline u32 sim_readl(struct sim_gk20a_linux *sim_linux, u32 r)
|
static inline u32 sim_readl(struct sim_gk20a *sim, u32 r)
|
||||||
{
|
{
|
||||||
|
struct sim_gk20a_linux *sim_linux =
|
||||||
|
container_of(sim, struct sim_gk20a_linux, sim);
|
||||||
|
|
||||||
return readl(sim_linux->regs + r);
|
return readl(sim_linux->regs + r);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void kunmap_and_free_iopage(void **kvaddr, struct page **page)
|
static int gk20a_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
|
||||||
{
|
{
|
||||||
if (*kvaddr) {
|
int err;
|
||||||
kunmap(*kvaddr);
|
|
||||||
*kvaddr = NULL;
|
err = nvgpu_dma_alloc(g, PAGE_SIZE, mem);
|
||||||
|
|
||||||
|
if (err)
|
||||||
|
return err;
|
||||||
|
/*
|
||||||
|
* create a valid cpu_va mapping
|
||||||
|
*/
|
||||||
|
nvgpu_mem_begin(g, mem);
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
if (*page) {
|
|
||||||
__free_page(*page);
|
static void gk20a_free_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
|
||||||
*page = NULL;
|
{
|
||||||
|
if (nvgpu_mem_is_valid(mem)) {
|
||||||
|
/*
|
||||||
|
* invalidate the cpu_va mapping
|
||||||
|
*/
|
||||||
|
nvgpu_mem_end(g, mem);
|
||||||
|
nvgpu_dma_free(g, mem);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
memset(mem, 0, sizeof(*mem));
|
||||||
}
|
}
|
||||||
|
|
||||||
static void gk20a_free_sim_support(struct gk20a *g)
|
static void gk20a_free_sim_support(struct gk20a *g)
|
||||||
{
|
{
|
||||||
struct sim_gk20a_linux *sim_linux =
|
struct sim_gk20a_linux *sim_linux =
|
||||||
container_of(g->sim, struct sim_gk20a_linux, sim);
|
container_of(g->sim, struct sim_gk20a_linux, sim);
|
||||||
/* free sim mappings, bfrs */
|
|
||||||
kunmap_and_free_iopage(&sim_linux->send_bfr.kvaddr,
|
|
||||||
&sim_linux->send_bfr.page);
|
|
||||||
|
|
||||||
kunmap_and_free_iopage(&sim_linux->recv_bfr.kvaddr,
|
gk20a_free_sim_buffer(g, &sim_linux->send_bfr);
|
||||||
&sim_linux->recv_bfr.page);
|
gk20a_free_sim_buffer(g, &sim_linux->recv_bfr);
|
||||||
|
gk20a_free_sim_buffer(g, &sim_linux->msg_bfr);
|
||||||
kunmap_and_free_iopage(&sim_linux->msg_bfr.kvaddr,
|
|
||||||
&sim_linux->msg_bfr.page);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void gk20a_remove_sim_support(struct sim_gk20a *s)
|
static void gk20a_remove_sim_support(struct sim_gk20a *s)
|
||||||
@@ -70,7 +90,7 @@ static void gk20a_remove_sim_support(struct sim_gk20a *s)
|
|||||||
container_of(g->sim, struct sim_gk20a_linux, sim);
|
container_of(g->sim, struct sim_gk20a_linux, sim);
|
||||||
|
|
||||||
if (sim_linux->regs)
|
if (sim_linux->regs)
|
||||||
sim_writel(sim_linux, sim_config_r(), sim_config_mode_disabled_v());
|
sim_writel(s, sim_config_r(), sim_config_mode_disabled_v());
|
||||||
gk20a_free_sim_support(g);
|
gk20a_free_sim_support(g);
|
||||||
|
|
||||||
if (sim_linux->regs) {
|
if (sim_linux->regs) {
|
||||||
@@ -82,35 +102,6 @@ static void gk20a_remove_sim_support(struct sim_gk20a *s)
|
|||||||
g->sim = NULL;
|
g->sim = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int alloc_and_kmap_iopage(struct gk20a *g,
|
|
||||||
void **kvaddr,
|
|
||||||
u64 *phys,
|
|
||||||
struct page **page)
|
|
||||||
{
|
|
||||||
int err = 0;
|
|
||||||
*page = alloc_page(GFP_KERNEL);
|
|
||||||
|
|
||||||
if (!*page) {
|
|
||||||
err = -ENOMEM;
|
|
||||||
nvgpu_err(g, "couldn't allocate io page");
|
|
||||||
goto fail;
|
|
||||||
}
|
|
||||||
|
|
||||||
*kvaddr = kmap(*page);
|
|
||||||
if (!*kvaddr) {
|
|
||||||
err = -ENOMEM;
|
|
||||||
nvgpu_err(g, "couldn't kmap io page");
|
|
||||||
goto fail;
|
|
||||||
}
|
|
||||||
*phys = page_to_phys(*page);
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
fail:
|
|
||||||
kunmap_and_free_iopage(kvaddr, page);
|
|
||||||
return err;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline u32 sim_msg_header_size(void)
|
static inline u32 sim_msg_header_size(void)
|
||||||
{
|
{
|
||||||
return 32U;
|
return 32U;
|
||||||
@@ -120,7 +111,11 @@ static inline u32 *sim_msg_bfr(struct gk20a *g, u32 byte_offset)
|
|||||||
{
|
{
|
||||||
struct sim_gk20a_linux *sim_linux =
|
struct sim_gk20a_linux *sim_linux =
|
||||||
container_of(g->sim, struct sim_gk20a_linux, sim);
|
container_of(g->sim, struct sim_gk20a_linux, sim);
|
||||||
return (u32 *)(sim_linux->msg_bfr.kvaddr + byte_offset);
|
u8 *cpu_va;
|
||||||
|
|
||||||
|
cpu_va = (u8 *)sim_linux->msg_bfr.cpu_va;
|
||||||
|
|
||||||
|
return (u32 *)(cpu_va + byte_offset);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline u32 *sim_msg_hdr(struct gk20a *g, u32 byte_offset)
|
static inline u32 *sim_msg_hdr(struct gk20a *g, u32 byte_offset)
|
||||||
@@ -155,7 +150,11 @@ static u32 *sim_send_ring_bfr(struct gk20a *g, u32 byte_offset)
|
|||||||
{
|
{
|
||||||
struct sim_gk20a_linux *sim_linux =
|
struct sim_gk20a_linux *sim_linux =
|
||||||
container_of(g->sim, struct sim_gk20a_linux, sim);
|
container_of(g->sim, struct sim_gk20a_linux, sim);
|
||||||
return (u32 *)(sim_linux->send_bfr.kvaddr + byte_offset);
|
u8 *cpu_va;
|
||||||
|
|
||||||
|
cpu_va = (u8 *)sim_linux->send_bfr.cpu_va;
|
||||||
|
|
||||||
|
return (u32 *)(cpu_va + byte_offset);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rpc_send_message(struct gk20a *g)
|
static int rpc_send_message(struct gk20a *g)
|
||||||
@@ -171,10 +170,10 @@ static int rpc_send_message(struct gk20a *g)
|
|||||||
sim_dma_target_phys_pci_coherent_f() |
|
sim_dma_target_phys_pci_coherent_f() |
|
||||||
sim_dma_status_valid_f() |
|
sim_dma_status_valid_f() |
|
||||||
sim_dma_size_4kb_f() |
|
sim_dma_size_4kb_f() |
|
||||||
sim_dma_addr_lo_f(sim_linux->msg_bfr.phys >> PAGE_SHIFT);
|
sim_dma_addr_lo_f(nvgpu_mem_get_addr(g, &sim_linux->msg_bfr) >> PAGE_SHIFT);
|
||||||
|
|
||||||
*sim_send_ring_bfr(g, dma_hi_offset*sizeof(u32)) =
|
*sim_send_ring_bfr(g, dma_hi_offset*sizeof(u32)) =
|
||||||
u64_hi32(sim_linux->msg_bfr.phys);
|
u64_hi32(nvgpu_mem_get_addr(g, &sim_linux->msg_bfr));
|
||||||
|
|
||||||
*sim_msg_hdr(g, sim_msg_sequence_r()) = g->sim->sequence_base++;
|
*sim_msg_hdr(g, sim_msg_sequence_r()) = g->sim->sequence_base++;
|
||||||
|
|
||||||
@@ -182,7 +181,7 @@ static int rpc_send_message(struct gk20a *g)
|
|||||||
PAGE_SIZE;
|
PAGE_SIZE;
|
||||||
|
|
||||||
/* Update the put pointer. This will trap into the host. */
|
/* Update the put pointer. This will trap into the host. */
|
||||||
sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
|
sim_writel(g->sim, sim_send_put_r(), g->sim->send_ring_put);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@@ -191,7 +190,11 @@ static inline u32 *sim_recv_ring_bfr(struct gk20a *g, u32 byte_offset)
|
|||||||
{
|
{
|
||||||
struct sim_gk20a_linux *sim_linux =
|
struct sim_gk20a_linux *sim_linux =
|
||||||
container_of(g->sim, struct sim_gk20a_linux, sim);
|
container_of(g->sim, struct sim_gk20a_linux, sim);
|
||||||
return (u32 *)(sim_linux->recv_bfr.kvaddr + byte_offset);
|
u8 *cpu_va;
|
||||||
|
|
||||||
|
cpu_va = (u8 *)sim_linux->recv_bfr.cpu_va;
|
||||||
|
|
||||||
|
return (u32 *)(cpu_va + byte_offset);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rpc_recv_poll(struct gk20a *g)
|
static int rpc_recv_poll(struct gk20a *g)
|
||||||
@@ -202,7 +205,7 @@ static int rpc_recv_poll(struct gk20a *g)
|
|||||||
|
|
||||||
/* Poll the recv ring get pointer in an infinite loop */
|
/* Poll the recv ring get pointer in an infinite loop */
|
||||||
do {
|
do {
|
||||||
g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
|
g->sim->recv_ring_put = sim_readl(g->sim, sim_recv_put_r());
|
||||||
} while (g->sim->recv_ring_put == g->sim->recv_ring_get);
|
} while (g->sim->recv_ring_put == g->sim->recv_ring_get);
|
||||||
|
|
||||||
/* process all replies */
|
/* process all replies */
|
||||||
@@ -219,18 +222,19 @@ static int rpc_recv_poll(struct gk20a *g)
|
|||||||
recv_phys_addr = (u64)recv_phys_addr_hi << 32 |
|
recv_phys_addr = (u64)recv_phys_addr_hi << 32 |
|
||||||
(u64)recv_phys_addr_lo << PAGE_SHIFT;
|
(u64)recv_phys_addr_lo << PAGE_SHIFT;
|
||||||
|
|
||||||
if (recv_phys_addr != sim_linux->msg_bfr.phys) {
|
if (recv_phys_addr !=
|
||||||
|
nvgpu_mem_get_addr(g, &sim_linux->msg_bfr)) {
|
||||||
nvgpu_err(g, "Error in RPC reply");
|
nvgpu_err(g, "Error in RPC reply");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Update GET pointer */
|
/* Update GET pointer */
|
||||||
g->sim->recv_ring_get = (g->sim->recv_ring_get + 2*sizeof(u32)) %
|
g->sim->recv_ring_get = (g->sim->recv_ring_get + 2*sizeof(u32))
|
||||||
PAGE_SIZE;
|
% PAGE_SIZE;
|
||||||
|
|
||||||
sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
|
sim_writel(g->sim, sim_recv_get_r(), g->sim->recv_ring_get);
|
||||||
|
|
||||||
g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
|
g->sim->recv_ring_put = sim_readl(g->sim, sim_recv_put_r());
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -316,53 +320,41 @@ int nvgpu_pci_init_sim_support(struct gk20a *g)
|
|||||||
sim_linux->regs = l->regs + sim_r();
|
sim_linux->regs = l->regs + sim_r();
|
||||||
|
|
||||||
/* allocate sim event/msg buffers */
|
/* allocate sim event/msg buffers */
|
||||||
err = alloc_and_kmap_iopage(g, &sim_linux->send_bfr.kvaddr,
|
err = gk20a_alloc_sim_buffer(g, &sim_linux->send_bfr);
|
||||||
&sim_linux->send_bfr.phys,
|
err = err || gk20a_alloc_sim_buffer(g, &sim_linux->recv_bfr);
|
||||||
&sim_linux->send_bfr.page);
|
err = err || gk20a_alloc_sim_buffer(g, &sim_linux->msg_bfr);
|
||||||
|
|
||||||
err = err || alloc_and_kmap_iopage(g, &sim_linux->recv_bfr.kvaddr,
|
if (err)
|
||||||
&sim_linux->recv_bfr.phys,
|
|
||||||
&sim_linux->recv_bfr.page);
|
|
||||||
|
|
||||||
err = err || alloc_and_kmap_iopage(g, &sim_linux->msg_bfr.kvaddr,
|
|
||||||
&sim_linux->msg_bfr.phys,
|
|
||||||
&sim_linux->msg_bfr.page);
|
|
||||||
|
|
||||||
if (!(sim_linux->send_bfr.kvaddr && sim_linux->recv_bfr.kvaddr &&
|
|
||||||
sim_linux->msg_bfr.kvaddr)) {
|
|
||||||
nvgpu_err(g, "couldn't allocate all sim buffers");
|
|
||||||
goto fail;
|
goto fail;
|
||||||
}
|
|
||||||
|
|
||||||
/* mark send ring invalid */
|
/* mark send ring invalid */
|
||||||
sim_writel(sim_linux, sim_send_ring_r(), sim_send_ring_status_invalid_f());
|
sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f());
|
||||||
|
|
||||||
/* read get pointer and make equal to put */
|
/* read get pointer and make equal to put */
|
||||||
g->sim->send_ring_put = sim_readl(sim_linux, sim_send_get_r());
|
g->sim->send_ring_put = sim_readl(g->sim, sim_send_get_r());
|
||||||
sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
|
sim_writel(g->sim, sim_send_put_r(), g->sim->send_ring_put);
|
||||||
|
|
||||||
/* write send ring address and make it valid */
|
/* write send ring address and make it valid */
|
||||||
phys = sim_linux->send_bfr.phys;
|
phys = nvgpu_mem_get_addr(g, &sim_linux->send_bfr);
|
||||||
sim_writel(sim_linux, sim_send_ring_hi_r(),
|
sim_writel(g->sim, sim_send_ring_hi_r(),
|
||||||
sim_send_ring_hi_addr_f(u64_hi32(phys)));
|
sim_send_ring_hi_addr_f(u64_hi32(phys)));
|
||||||
sim_writel(sim_linux, sim_send_ring_r(),
|
sim_writel(g->sim, sim_send_ring_r(),
|
||||||
sim_send_ring_status_valid_f() |
|
sim_send_ring_status_valid_f() |
|
||||||
sim_send_ring_target_phys_pci_coherent_f() |
|
sim_send_ring_target_phys_pci_coherent_f() |
|
||||||
sim_send_ring_size_4kb_f() |
|
sim_send_ring_size_4kb_f() |
|
||||||
sim_send_ring_addr_lo_f(phys >> PAGE_SHIFT));
|
sim_send_ring_addr_lo_f(phys >> PAGE_SHIFT));
|
||||||
|
|
||||||
/* repeat for recv ring (but swap put,get as roles are opposite) */
|
/* repeat for recv ring (but swap put,get as roles are opposite) */
|
||||||
sim_writel(sim_linux, sim_recv_ring_r(), sim_recv_ring_status_invalid_f());
|
sim_writel(g->sim, sim_recv_ring_r(), sim_recv_ring_status_invalid_f());
|
||||||
|
|
||||||
/* read put pointer and make equal to get */
|
/* read put pointer and make equal to get */
|
||||||
g->sim->recv_ring_get = sim_readl(sim_linux, sim_recv_put_r());
|
g->sim->recv_ring_get = sim_readl(g->sim, sim_recv_put_r());
|
||||||
sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
|
sim_writel(g->sim, sim_recv_get_r(), g->sim->recv_ring_get);
|
||||||
|
|
||||||
/* write send ring address and make it valid */
|
/* write send ring address and make it valid */
|
||||||
phys = sim_linux->recv_bfr.phys;
|
phys = nvgpu_mem_get_addr(g, &sim_linux->recv_bfr);
|
||||||
sim_writel(sim_linux, sim_recv_ring_hi_r(),
|
sim_writel(g->sim, sim_recv_ring_hi_r(),
|
||||||
sim_recv_ring_hi_addr_f(u64_hi32(phys)));
|
sim_recv_ring_hi_addr_f(u64_hi32(phys)));
|
||||||
sim_writel(sim_linux, sim_recv_ring_r(),
|
sim_writel(g->sim, sim_recv_ring_r(),
|
||||||
sim_recv_ring_status_valid_f() |
|
sim_recv_ring_status_valid_f() |
|
||||||
sim_recv_ring_target_phys_pci_coherent_f() |
|
sim_recv_ring_target_phys_pci_coherent_f() |
|
||||||
sim_recv_ring_size_4kb_f() |
|
sim_recv_ring_size_4kb_f() |
|
||||||
|
|||||||
Reference in New Issue
Block a user