mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
gpu: nvgpu: Move Linux files away from common
Move all Linux source code files to drivers/gpu/nvgpu/os/linux from drivers/gpu/nvgpu/common/linux. This changes the meaning of common to be OS independent. JIRA NVGPU-598 JIRA NVGPU-601 Change-Id: Ib7f2a43d3688bb0d0b7dcc48469a6783fd988ce9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747714 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
committed by
mobile promotions
mobile promotions
parent
98d996f4ff
commit
2a2c16af5f
428
drivers/gpu/nvgpu/os/linux/scale.c
Normal file
428
drivers/gpu/nvgpu/os/linux/scale.c
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@@ -0,0 +1,428 @@
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/*
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* gk20a clock scaling profile
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*
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* Copyright (c) 2013-2017, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/devfreq.h>
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#include <linux/export.h>
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#include <soc/tegra/chip-id.h>
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#include <linux/pm_qos.h>
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#include <governor.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/log.h>
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#include "gk20a/gk20a.h"
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#include "platform_gk20a.h"
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#include "scale.h"
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#include "os_linux.h"
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/*
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* gk20a_scale_qos_notify()
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*
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* This function is called when the minimum QoS requirement for the device
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* has changed. The function calls postscaling callback if it is defined.
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*/
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#if defined(CONFIG_COMMON_CLK)
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int gk20a_scale_qos_notify(struct notifier_block *nb,
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unsigned long n, void *p)
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{
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struct gk20a_scale_profile *profile =
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container_of(nb, struct gk20a_scale_profile,
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qos_notify_block);
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struct gk20a *g = get_gk20a(profile->dev);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct devfreq *devfreq = l->devfreq;
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if (!devfreq)
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return NOTIFY_OK;
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mutex_lock(&devfreq->lock);
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/* check for pm_qos min and max frequency requirement */
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profile->qos_min_freq =
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(unsigned long)pm_qos_read_min_bound(PM_QOS_GPU_FREQ_BOUNDS) * 1000UL;
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profile->qos_max_freq =
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(unsigned long)pm_qos_read_max_bound(PM_QOS_GPU_FREQ_BOUNDS) * 1000UL;
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if (profile->qos_min_freq > profile->qos_max_freq) {
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nvgpu_err(g,
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"QoS: setting invalid limit, min_freq=%lu max_freq=%lu",
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profile->qos_min_freq, profile->qos_max_freq);
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profile->qos_min_freq = profile->qos_max_freq;
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}
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update_devfreq(devfreq);
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mutex_unlock(&devfreq->lock);
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return NOTIFY_OK;
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}
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#else
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int gk20a_scale_qos_notify(struct notifier_block *nb,
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unsigned long n, void *p)
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{
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struct gk20a_scale_profile *profile =
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container_of(nb, struct gk20a_scale_profile,
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qos_notify_block);
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struct gk20a_platform *platform = dev_get_drvdata(profile->dev);
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struct gk20a *g = get_gk20a(profile->dev);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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unsigned long freq;
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if (!platform->postscale)
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return NOTIFY_OK;
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/* get the frequency requirement. if devfreq is enabled, check if it
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* has higher demand than qos */
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freq = platform->clk_round_rate(profile->dev,
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(u32)pm_qos_read_min_bound(PM_QOS_GPU_FREQ_BOUNDS));
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if (l->devfreq)
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freq = max(l->devfreq->previous_freq, freq);
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/* Update gpu load because we may scale the emc target
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* if the gpu load changed. */
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nvgpu_pmu_load_update(g);
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platform->postscale(profile->dev, freq);
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return NOTIFY_OK;
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}
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#endif
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/*
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* gk20a_scale_make_freq_table(profile)
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*
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* This function initialises the frequency table for the given device profile
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*/
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static int gk20a_scale_make_freq_table(struct gk20a_scale_profile *profile)
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{
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struct gk20a_platform *platform = dev_get_drvdata(profile->dev);
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int num_freqs, err;
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unsigned long *freqs;
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if (platform->get_clk_freqs) {
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/* get gpu frequency table */
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err = platform->get_clk_freqs(profile->dev, &freqs,
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&num_freqs);
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if (err)
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return -ENOSYS;
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} else
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return -ENOSYS;
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profile->devfreq_profile.freq_table = (unsigned long *)freqs;
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profile->devfreq_profile.max_state = num_freqs;
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return 0;
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}
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/*
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* gk20a_scale_target(dev, *freq, flags)
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*
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* This function scales the clock
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*/
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static int gk20a_scale_target(struct device *dev, unsigned long *freq,
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u32 flags)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct gk20a *g = platform->g;
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct gk20a_scale_profile *profile = g->scale_profile;
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struct devfreq *devfreq = l->devfreq;
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unsigned long local_freq = *freq;
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unsigned long rounded_rate;
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unsigned long min_freq = 0, max_freq = 0;
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/*
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* Calculate floor and cap frequency values
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*
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* Policy :
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* We have two APIs to clip the frequency
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* 1. devfreq
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* 2. pm_qos
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*
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* To calculate floor (min) freq, we select MAX of floor frequencies
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* requested from both APIs
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* To get cap (max) freq, we select MIN of max frequencies
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*
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* In case we have conflict (min_freq > max_freq) after above
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* steps, we ensure that max_freq wins over min_freq
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*/
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min_freq = max_t(u32, devfreq->min_freq, profile->qos_min_freq);
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max_freq = min_t(u32, devfreq->max_freq, profile->qos_max_freq);
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if (min_freq > max_freq)
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min_freq = max_freq;
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/* Clip requested frequency */
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if (local_freq < min_freq)
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local_freq = min_freq;
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if (local_freq > max_freq)
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local_freq = max_freq;
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/* set the final frequency */
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rounded_rate = platform->clk_round_rate(dev, local_freq);
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/* Check for duplicate request */
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if (rounded_rate == g->last_freq)
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return 0;
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if (g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK) == rounded_rate)
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*freq = rounded_rate;
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else {
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g->ops.clk.set_rate(g, CTRL_CLK_DOMAIN_GPCCLK, rounded_rate);
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*freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK);
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}
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g->last_freq = *freq;
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/* postscale will only scale emc (dram clock) if evaluating
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* gk20a_tegra_get_emc_rate() produces a new or different emc
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* target because the load or_and gpufreq has changed */
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if (platform->postscale)
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platform->postscale(dev, rounded_rate);
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return 0;
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}
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/*
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* update_load_estimate_gpmu(profile)
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*
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* Update load estimate using gpmu. The gpmu value is normalised
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* based on the time it was asked last time.
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*/
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static void update_load_estimate_gpmu(struct device *dev)
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{
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struct gk20a *g = get_gk20a(dev);
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struct gk20a_scale_profile *profile = g->scale_profile;
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unsigned long dt;
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u32 busy_time;
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ktime_t t;
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t = ktime_get();
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dt = ktime_us_delta(t, profile->last_event_time);
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profile->dev_stat.total_time = dt;
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profile->last_event_time = t;
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nvgpu_pmu_load_norm(g, &busy_time);
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profile->dev_stat.busy_time = (busy_time * dt) / 1000;
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}
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/*
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* gk20a_scale_suspend(dev)
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*
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* This function informs devfreq of suspend
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*/
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void gk20a_scale_suspend(struct device *dev)
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{
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struct gk20a *g = get_gk20a(dev);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct devfreq *devfreq = l->devfreq;
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if (!devfreq)
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return;
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devfreq_suspend_device(devfreq);
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}
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/*
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* gk20a_scale_resume(dev)
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*
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* This functions informs devfreq of resume
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*/
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void gk20a_scale_resume(struct device *dev)
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{
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struct gk20a *g = get_gk20a(dev);
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct devfreq *devfreq = l->devfreq;
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if (!devfreq)
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return;
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g->last_freq = 0;
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devfreq_resume_device(devfreq);
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}
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/*
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* gk20a_scale_get_dev_status(dev, *stat)
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*
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* This function queries the current device status.
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*/
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static int gk20a_scale_get_dev_status(struct device *dev,
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struct devfreq_dev_status *stat)
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{
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struct gk20a *g = get_gk20a(dev);
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struct gk20a_scale_profile *profile = g->scale_profile;
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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/* update the software shadow */
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nvgpu_pmu_load_update(g);
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/* inform edp about new constraint */
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if (platform->prescale)
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platform->prescale(dev);
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/* Make sure there are correct values for the current frequency */
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profile->dev_stat.current_frequency =
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g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK);
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/* Update load estimate */
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update_load_estimate_gpmu(dev);
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/* Copy the contents of the current device status */
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*stat = profile->dev_stat;
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/* Finally, clear out the local values */
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profile->dev_stat.total_time = 0;
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profile->dev_stat.busy_time = 0;
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return 0;
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}
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/*
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* get_cur_freq(struct device *dev, unsigned long *freq)
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*
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* This function gets the current GPU clock rate.
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*/
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static int get_cur_freq(struct device *dev, unsigned long *freq)
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{
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struct gk20a *g = get_gk20a(dev);
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*freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK);
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return 0;
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}
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/*
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* gk20a_scale_init(dev)
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*/
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void gk20a_scale_init(struct device *dev)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct gk20a *g = platform->g;
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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struct gk20a_scale_profile *profile;
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int err;
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if (g->scale_profile)
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return;
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if (!platform->devfreq_governor && !platform->qos_notify)
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return;
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profile = nvgpu_kzalloc(g, sizeof(*profile));
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profile->dev = dev;
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profile->dev_stat.busy = false;
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/* Create frequency table */
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err = gk20a_scale_make_freq_table(profile);
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if (err || !profile->devfreq_profile.max_state)
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goto err_get_freqs;
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profile->qos_min_freq = 0;
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profile->qos_max_freq = UINT_MAX;
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/* Store device profile so we can access it if devfreq governor
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* init needs that */
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g->scale_profile = profile;
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if (platform->devfreq_governor) {
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struct devfreq *devfreq;
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profile->devfreq_profile.initial_freq =
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profile->devfreq_profile.freq_table[0];
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profile->devfreq_profile.target = gk20a_scale_target;
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profile->devfreq_profile.get_dev_status =
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gk20a_scale_get_dev_status;
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profile->devfreq_profile.get_cur_freq = get_cur_freq;
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profile->devfreq_profile.polling_ms = 25;
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devfreq = devfreq_add_device(dev,
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&profile->devfreq_profile,
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platform->devfreq_governor, NULL);
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if (IS_ERR(devfreq))
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devfreq = NULL;
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l->devfreq = devfreq;
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}
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/* Should we register QoS callback for this device? */
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if (platform->qos_notify) {
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profile->qos_notify_block.notifier_call =
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platform->qos_notify;
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pm_qos_add_min_notifier(PM_QOS_GPU_FREQ_BOUNDS,
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&profile->qos_notify_block);
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pm_qos_add_max_notifier(PM_QOS_GPU_FREQ_BOUNDS,
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&profile->qos_notify_block);
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}
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return;
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err_get_freqs:
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nvgpu_kfree(g, profile);
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}
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void gk20a_scale_exit(struct device *dev)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct gk20a *g = platform->g;
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struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
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int err;
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if (platform->qos_notify) {
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pm_qos_remove_min_notifier(PM_QOS_GPU_FREQ_BOUNDS,
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&g->scale_profile->qos_notify_block);
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pm_qos_remove_max_notifier(PM_QOS_GPU_FREQ_BOUNDS,
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&g->scale_profile->qos_notify_block);
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}
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if (platform->devfreq_governor) {
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err = devfreq_remove_device(l->devfreq);
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l->devfreq = NULL;
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}
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nvgpu_kfree(g, g->scale_profile);
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g->scale_profile = NULL;
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}
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/*
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* gk20a_scale_hw_init(dev)
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*
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* Initialize hardware portion of the device
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*/
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void gk20a_scale_hw_init(struct device *dev)
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{
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struct gk20a_platform *platform = dev_get_drvdata(dev);
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struct gk20a_scale_profile *profile = platform->g->scale_profile;
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/* make sure that scaling has bee initialised */
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if (!profile)
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return;
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profile->dev_stat.total_time = 0;
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profile->last_event_time = ktime_get();
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}
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