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gpu: nvgpu: rename <nvgpu/top.h> to <nvgpu/device.h>

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top.h is a description of "devices" available on the GPU. As such
rename this header to device.h.

device.h will ultimately be a unit of actual C code that will rely
on the top HAL to fill a device list.

JIRA NVGPU-5421

Change-Id: If6e4a537d2209e429a678761a34713723da7a00a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319648
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2020-03-26 20:29:06 -06:00
parent 957b19092f
commit 2a3bb9107f
17 changed files with 28 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/nvgpu-hal-new.yaml
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@@ -778,7 +778,7 @@ func:
top_fusa: top_fusa:
safe: yes safe: yes
owner: Tejal K owner: Tejal K
sources: [ include/nvgpu/top.h, sources: [ include/nvgpu/device.h,
include/nvgpu/gops_top.h, include/nvgpu/gops_top.h,
hal/top/top_gm20b_fusa.c, hal/top/top_gm20b_fusa.c,
hal/top/top_gm20b.h, hal/top/top_gm20b.h,

2
drivers/gpu/nvgpu/common/fifo/engines.c
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@@ -37,7 +37,7 @@
#include <nvgpu/power_features/pg.h> #include <nvgpu/power_features/pg.h>
#include <nvgpu/channel.h> #include <nvgpu/channel.h>
#include <nvgpu/soc.h> #include <nvgpu/soc.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/gr/gr_falcon.h> #include <nvgpu/gr/gr_falcon.h>
#include <nvgpu/gr/gr.h> #include <nvgpu/gr/gr.h>
#include <nvgpu/fifo.h> #include <nvgpu/fifo.h>

2
drivers/gpu/nvgpu/common/nvlink/nvlink.c
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@@ -24,7 +24,7 @@
#include <nvgpu/nvlink.h> #include <nvgpu/nvlink.h>
#include <nvgpu/nvlink_probe.h> #include <nvgpu/nvlink_probe.h>
#include <nvgpu/enabled.h> #include <nvgpu/enabled.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/nvlink_bios.h> #include <nvgpu/nvlink_bios.h>
#ifdef CONFIG_NVGPU_NVLINK #ifdef CONFIG_NVGPU_NVLINK

4
drivers/gpu/nvgpu/hal/fifo/engines_gm20b.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/engines.h> #include <nvgpu/engines.h>
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include <nvgpu/errno.h> #include <nvgpu/errno.h>

4
drivers/gpu/nvgpu/hal/fifo/engines_gp10b_fusa.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/engines.h> #include <nvgpu/engines.h>
#include <nvgpu/log.h> #include <nvgpu/log.h>
#include <nvgpu/errno.h> #include <nvgpu/errno.h>

1
drivers/gpu/nvgpu/hal/nvlink/nvlink_gv100.c
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@@ -26,6 +26,7 @@
#include <nvgpu/utils.h> #include <nvgpu/utils.h>
#include <nvgpu/timers.h> #include <nvgpu/timers.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/device.h>
#include <nvgpu/nvlink_minion.h> #include <nvgpu/nvlink_minion.h>
#include <nvgpu/gops_mc.h> #include <nvgpu/gops_mc.h>
#include <nvgpu/mc.h> #include <nvgpu/mc.h>

4
drivers/gpu/nvgpu/hal/top/top_gm20b.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/types.h> #include <nvgpu/types.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>

4
drivers/gpu/nvgpu/hal/top/top_gm20b_fusa.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/types.h> #include <nvgpu/types.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>

6
drivers/gpu/nvgpu/hal/top/top_gp10b.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/types.h> #include <nvgpu/types.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
@@ -56,4 +56,4 @@ int gp10b_device_info_parse_data(struct gk20a *g, u32 table_entry, u32 *inst_id,
nvgpu_log_info(g, "Inst_id: %u", *inst_id); nvgpu_log_info(g, "Inst_id: %u", *inst_id);
return 0; return 0;
} }

4
drivers/gpu/nvgpu/hal/top/top_gp10b_fusa.c
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/types.h> #include <nvgpu/types.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>

6
drivers/gpu/nvgpu/include/nvgpu/top.h → drivers/gpu/nvgpu/include/nvgpu/device.h
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@@ -20,8 +20,8 @@
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#ifndef NVGPU_TOP_H #ifndef NVGPU_DEVICE_H
#define NVGPU_TOP_H #define NVGPU_DEVICE_H
/** /**
* @file * @file
* *
@@ -118,4 +118,4 @@ struct nvgpu_device_info {
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */ /** @endcond DOXYGEN_SHOULD_SKIP_THIS */
}; };
#endif /* NVGPU_TOP_H */ #endif /* NVGPU_DEVICE_H */

4
drivers/gpu/nvgpu/include/nvgpu/engines.h
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@@ -46,7 +46,7 @@ struct nvgpu_fifo;
/** /**
* Engine enum types used for s/w purpose. These enum values are * Engine enum types used for s/w purpose. These enum values are
* different as compared to engine enum types defined by h/w. * different as compared to engine enum types defined by h/w.
* Refer top.h header file. * Refer device.h header file.
*/ */
enum nvgpu_fifo_engine { enum nvgpu_fifo_engine {
/** GR engine enum */ /** GR engine enum */
@@ -110,7 +110,7 @@ struct nvgpu_engine_info {
}; };
/** /**
* @brief Get s/w defined engine enum type for engine enum type defined by h/w. * @brief Get s/w defined engine enum type for engine enum type defined by h/w.
* See top.h for engine enum types defined by h/w. * See device.h for engine enum types defined by h/w.
* *
* @param g [in] The GPU driver struct. * @param g [in] The GPU driver struct.
* @param engine_type [in] Engine enum type defined by h/w. * @param engine_type [in] Engine enum type defined by h/w.

4
drivers/gpu/nvgpu/include/nvgpu/tsg.h
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@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -151,7 +151,7 @@ struct nvgpu_tsg {
* is one runlist per engine (graphics and grcopy share a runlist). * is one runlist per engine (graphics and grcopy share a runlist).
* The runlist_id specifies the h/w runlist to which a runlist in * The runlist_id specifies the h/w runlist to which a runlist in
* memory is being submitted. Each runlist serves a specific set of * memory is being submitted. Each runlist serves a specific set of
* engines. Refer top.h. * engines. Refer to device.h.
*/ */
u32 runlist_id; u32 runlist_id;
/** tgid (OS specific) of the process that openend the TSG. */ /** tgid (OS specific) of the process that openend the TSG. */

2
userspace/units/fifo/engine/gm20b/nvgpu-engine-gm20b.c
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@@ -29,7 +29,7 @@
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/engines.h> #include <nvgpu/engines.h>
#include <nvgpu/engine_status.h> #include <nvgpu/engine_status.h>

2
userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.c
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@@ -29,7 +29,7 @@
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/io.h> #include <nvgpu/io.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/engines.h> #include <nvgpu/engines.h>
#include <nvgpu/engine_status.h> #include <nvgpu/engine_status.h>

2
userspace/units/mc/nvgpu-mc.c
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@@ -27,7 +27,7 @@
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/mc.h> #include <nvgpu/mc.h>
#include <nvgpu/hal_init.h> #include <nvgpu/hal_init.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <nvgpu/engines.h> #include <nvgpu/engines.h>
#include <nvgpu/ltc.h> #include <nvgpu/ltc.h>
#include <nvgpu/hw/gp10b/hw_mc_gp10b.h> #include <nvgpu/hw/gp10b/hw_mc_gp10b.h>

2
userspace/units/top/nvgpu-top.c
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@@ -25,7 +25,7 @@
#include <nvgpu/posix/io.h> #include <nvgpu/posix/io.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/top.h> #include <nvgpu/device.h>
#include <hal/top/top_gm20b.h> #include <hal/top/top_gm20b.h>
#include <hal/top/top_gp10b.h> #include <hal/top/top_gp10b.h>
#include <hal/top/top_gv11b.h> #include <hal/top/top_gv11b.h>