gpu: nvgpu: NVENC support on TU104

This patch adds nvenc support for TU104
- Fetch engine/dev info for nvenc
- Falcon NS boot (fw loading) support
- Engine context creation for nvenc
- Skip golden image for multimedia engines
- Avoid subctx for nvenc as it is a non-VEID engine
- Job submission/flow changes for nvenc
- Code refactoring to scale up the support for other multimedia
  engines in future.

Bug 3763551

Change-Id: I03d4e731ebcef456bcc5ce157f3aa39883270dc0
Signed-off-by: Santosh BS <santoshb@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2859416
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Santosh BS
2023-02-16 12:15:18 +00:00
committed by mobile promotions
parent faf6ff3f34
commit 2a865e3aad
49 changed files with 1481 additions and 65 deletions

View File

@@ -500,7 +500,8 @@ static int __gk20a_channel_open(struct gk20a *g, struct nvgpu_cdev *cdev,
if (runlist_id == -1) {
tmp_runlist_id = nvgpu_grmgr_get_gpu_instance_runlist_id(g, gpu_instance_id);
} else {
if (nvgpu_grmgr_is_valid_runlist_id(g, gpu_instance_id, runlist_id)) {
if (nvgpu_grmgr_is_valid_runlist_id(g, gpu_instance_id, runlist_id) ||
nvgpu_engine_is_multimedia_runlist_id(g, runlist_id)) {
tmp_runlist_id = runlist_id;
} else {
return -EINVAL;
@@ -1266,9 +1267,17 @@ long gk20a_channel_ioctl(struct file *filp,
}
#endif
err = nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id,
nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num,
args->flags));
if (nvgpu_engine_is_multimedia_runlist_id(g, ch->runlist->id)) {
if (ch->g->ops.nvenc.multimedia_alloc_ctx != NULL) {
err = ch->g->ops.nvenc.multimedia_alloc_ctx(ch, args->class_num, 0);
} else {
err = -EINVAL;
}
} else {
err = nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id,
nvgpu_ioctl_channel_alloc_obj_ctx(ch, args->class_num,
args->flags));
}
gk20a_idle(ch->g);
break;
}

View File

@@ -1195,6 +1195,8 @@ static void nvgpu_gpu_fetch_engine_info_item(struct gk20a *g,
} else {
dst_info->engine_id = NVGPU_GPU_ENGINE_ID_ASYNC_COPY;
}
} else if (nvgpu_device_is_nvenc(g, dev)) {
dst_info->engine_id = NVGPU_GPU_ENGINE_ID_NVENC;
}
dst_info->engine_instance = dev_inst_id;
@@ -1221,8 +1223,13 @@ static int nvgpu_gpu_get_engine_info(
const struct nvgpu_device *dev = g->fifo.active_engines[i];
struct nvgpu_gpu_get_engine_info_item dst_info;
nvgpu_gpu_fetch_engine_info_item(g, &dst_info, dev,
dev->inst_id, gr_dev->runlist_id);
if (nvgpu_device_is_nvenc(g, dev)) {
nvgpu_gpu_fetch_engine_info_item(g, &dst_info, dev,
dev->inst_id, dev->runlist_id);
} else {
nvgpu_gpu_fetch_engine_info_item(g, &dst_info, dev,
dev->inst_id, gr_dev->runlist_id);
}
if (report_index < max_buffer_engines) {
err = copy_to_user(&dst_item_list[report_index],