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nvgpu: ga10b: gsp: implement runlist submit apis

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- implemented device info cmd to send device info to the gsp for
  runlist submission. Currently GSP scheduler support only GR
  engine '0' instance.
- implemented runlist submit cmd. GSP firmware will submit the
  corresponding runlist by writing into submit registers. This
  command is direct replacement of hw_submit ga10b hal for GR engine.

NVGPU-6790

Signed-off-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Change-Id: I5dc573a6ad698fe20b49a3466a8e50b94cae74df
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2608923
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Ramesh Mylavarapu
2022-01-04 23:20:36 +05:30
committed by mobile promotions
parent 6c1a77dfa9
commit 2a98d20263
13 changed files with 307 additions and 5 deletions
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3
drivers/gpu/nvgpu/include/nvgpu/gops/runlist.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -102,6 +102,7 @@ struct gops_runlist {
void (*init_enginfo)(struct gk20a *g, struct nvgpu_fifo *f);
u32 (*get_tsg_max_timeslice)(void);
u32 (*get_runlist_id)(struct gk20a *g, u32 runlist_pri_base);
u32 (*get_runlist_aperture)(struct gk20a *g, struct nvgpu_runlist *runlist);
u32 (*get_engine_id_from_rleng_id)(struct gk20a *g,
u32 rleng_id, u32 runlist_pri_base);
u32 (*get_chram_bar0_offset)(struct gk20a *g, u32 runlist_pri_base);

3
drivers/gpu/nvgpu/include/nvgpu/gsp.h
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@@ -25,6 +25,8 @@
#include <nvgpu/lock.h>
#include <nvgpu/nvgpu_mem.h>
struct gk20a;
struct nvgpu_gsp;
struct nvgpu_runlist;
struct gsp_fw {
/* gsp ucode name */
@@ -65,4 +67,5 @@ void nvgpu_gsp_isr(struct gk20a *g);
void nvgpu_gsp_isr_support(struct gk20a *g, struct nvgpu_gsp *gsp, bool enable);
int nvgpu_gsp_wait_for_priv_lockdown_release(struct nvgpu_gsp *gsp,
signed int timeoutms);
int nvgpu_gsp_runlist_submit(struct gk20a *g, struct nvgpu_runlist *runlist);
#endif /* NVGPU_GSP */